СПИСОК патентов США - подгруппа МПК16 H04L7/02
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№ п/п | Номер патента | Название патента | |||
2017 | |||||
1 | 9608800 | Frequency aided clock recovery based on low speed information exchange mechanism | |||
2 | 9606891 | Tracing data from an asynchronous interface | |||
3 | 9594396 | Synchronizing data transfer between a first clock domain and second clock domain | |||
4 | 9577786 | Pilot symbol generation for highly-spectrally-efficient communications | |||
5 | 9577769 | Built-in self-test technique for detection of imperfectly connected antenna in OFDM transceivers | |||
6 | 9571942 | Hearing device and a method of compensating a frequency difference between a transmitter and receiver | |||
2016 | |||||
7 | 9520965 | Monitoring and control of reference clocks to reduce bit error ratio | |||
8 | 9509317 | Rotational synchronizer circuit for metastablity resolution | |||
9 | 9503250 | Data communication with interventional instruments | |||
10 | 9503157 | Digital signal processing for PLC communications having communication frequencies | |||
11 | 9490969 | Transmission apparatus, reception apparatus, and transmission and reception system | |||
12 | 9490966 | Frequency planning for digital power amplifier | |||
13 | 9490965 | Simultaneous transmission of clock and bidirectional data over a communication channel | |||
14 | 9471531 | Adaptive isochronous USB audio to RF communication device | |||
15 | 9467251 | Method and system for forward error correction decoding with parity check for use in low complexity highly-spectrally efficient communications | |||
16 | 9444613 | Sensor, control unit and method to communicate between sensors and control units | |||
17 | 9444440 | Transition detector | |||
18 | 9432176 | Circuit and method for clock and data recovery | |||
19 | 9425807 | Circuit for symbol timing synchronization | |||
20 | 9407428 | Reception apparatus, reception method, and program | |||
21 | 9397916 | Communication device and communication system | |||
22 | 9397823 | Methods and circuits for reducing clock jitter | |||
23 | 9397821 | Method, apparatus, mobile communication terminal, computer program and storage medium for adjusting frequency error of terminal | |||
24 | 9385893 | Modular low power serializer-deserializer | |||
25 | 9379880 | Clock recovery circuit | |||
26 | 9374250 | Wireline receiver circuitry having collaborative timing recovery | |||
27 | 9369266 | Techniques for clock data recovery | |||
28 | 9369265 | Data receiver | |||
29 | 9356588 | Linearity of phase interpolators using capacitive elements | |||
30 | 9337996 | Data recovery circuit | |||
31 | 9325488 | Noise shaped interpolator and decimator apparatus and method | |||
32 | 9306732 | At-rate SERDES clock data recovery with controllable offset | |||
33 | 9294263 | Methods and systems of synchronizer selection | |||
34 | 9294261 | System and method for generating an essentially sinusoidal synchronization pulse | |||
35 | 9276732 | Frequency synchronizing a local oscillator in a remote unit in a distributed antenna system (DAS) used for frequency shifting communications signals based on a received digital pulse signal from a central unit | |||
36 | 9270416 | Multi-mode transmitter for highly-spectrally-efficient communications | |||
37 | 9270353 | Communication system for spatially-encoded wireless communications | |||
38 | 9264179 | Decision feedback equalizer for highly spectrally efficient communications | |||
39 | 9258109 | Clock recovery method and apparatus | |||
40 | 9258107 | Local oscillator phase noise tracking for single carrier transmission | |||
41 | 9252822 | Adaptive non-linear model for highly-spectrally-efficient communications | |||
42 | 9246668 | Unified control for digital timing recovery and packet processing | |||
43 | 9240847 | Method for suppressing interferences in a sampling process as well as a device for carrying out the method | |||
44 | 9231628 | Low-complexity, highly-spectrally-efficient communications | |||
45 | 9231571 | Resonant clock amplifier with a digitally tunable delay | |||
46 | 9230505 | Apparatus, system and method for providing clock and data signaling | |||
2015 | |||||
47 | 9225343 | Electronics device capable of efficient communication between components with asyncronous clocks | |||
48 | 9225321 | Signal synchronizing systems and methods | |||
49 | 9215110 | Hitless efficient transmitter protection of all outdoor radios | |||
50 | 9209843 | Fine phase estimation for highly spectrally efficient communications | |||
51 | 9203677 | Signal processing method and associated apparatus | |||
52 | 9201449 | Method and apparatus for source-synchronous capture using a first-in-first-out unit | |||
53 | 9191191 | Device and methodology for virtual audio/video circuit switching in a packet-based network | |||
54 | 9191190 | Methods and apparatus for digital host-lock mode in a transceiver | |||
55 | 9191187 | Reception circuit and semiconductor integrated circuit | |||
56 | 9184909 | Apparatus and methods for clock and data recovery | |||
57 | 9184908 | Apparatus and method for reducing jitter in periodic signals | |||
58 | 9170981 | Adaptive isochronous USB audio to RF communication device | |||
59 | 9166833 | Feed forward equalization for highly-spectrally-efficient communications | |||
60 | 9137005 | Managing arbitration in mixed link rate wide ports | |||
61 | 9130733 | Alignment of non-synchronous data streams | |||
62 | 9130700 | Noise shaped interpolator and decimator apparatus and method | |||
63 | 9117031 | Generating interface adjustment signals in a device-to-device interconnection system | |||
64 | 9112673 | Reception circuit | |||
65 | 9106401 | Deterministic synchronization for transmitting signals between different clock domains | |||
66 | 9094183 | Circuits for receiving data | |||
67 | 9088403 | Identification codewords for a rate-adapted version of a data stream | |||
68 | 9078278 | Method and apparatus for soft buffer management for carrier aggregation | |||
69 | 9077511 | Phase interpolator | |||
70 | 9071410 | Simultaneous transmission of clock and bidirectional data over a communication channel | |||
71 | 9054854 | Bit slip circuitry for serial data signals | |||
72 | 9001949 | Methods and QAM receiver for performing timing recovery | |||
73 | 8976962 | Apparatus and method for generating group key using status of wireless channel | |||
74 | 8934554 | Virtual multicarrier design for orthogonal frequency division multiple access communications | |||
2014 | |||||
75 | 8923463 | Offset calibration and adaptive channel data sample positioning | |||
76 | 8913679 | Systems and methods for jointly detecting channel interference on a synchronized mobile communication network | |||
77 | 8909998 | Phase shift adjusting method and circuit | |||
78 | 8908818 | Channel estimation method, apparatus and system | |||
79 | 8855256 | Serial data recovery in digital receiver configurations | |||
80 | 8848850 | Pulse width modulation receiver circuitry | |||
81 | 8848849 | SPDIF clock and data recovery with sample rate converter | |||
82 | 8824613 | Signal transmission device, and transmission control method | |||
83 | 8817933 | Method and apparatus for clock data recovery from Manchester coded serial data stream | |||
84 | 8812063 | Signal characteristic-based leading edge detection | |||
85 | 8811559 | Timing recovery circuit and receiver circuit including the same | |||
86 | 8798219 | High-speed serial data transceiver and related methods | |||
87 | 8775701 | Method and apparatus for source-synchronous capture using a first-in-first-out unit | |||
88 | 8774337 | Phase control block for managing multiple clock domains in systems with frequency offsets | |||
89 | 8774336 | Low-power highly-accurate passive multiphase clock generation scheme by using polyphase filters | |||
90 | 8767900 | Signal transition detection circuit and method of the same | |||
91 | 8750445 | Method and system for communicating information in a digital signal | |||
92 | 8750444 | Snapshot processing of timing data | |||
93 | 8737555 | Digital signal processing for PLC communications having communication frequencies | |||
94 | 8737552 | Synchronous data transfer | |||
95 | 8724764 | Distortion tolerant clock and data recovery | |||
96 | 8724761 | Symbol synchronization apparatus and method of passive RFID reader | |||
97 | 8711996 | Methods and apparatus for determining a phase error in signals | |||
98 | 8711995 | Powerline communication receiver | |||
99 | 8705649 | Method and receiver structure for interference cancellation in co-ordinated multipoint systems | |||
100 | 8675798 | Systems, circuits, and methods for phase inversion | |||
101 | 8638894 | Data communication apparatus, data communication system, and data communication method | |||
102 | 8634510 | Full digital bang bang frequency detector with no data pattern dependency | |||
2013 | |||||
103 | 8611485 | Method and a device for controlling frequency synchronization | |||
104 | 8611484 | Receiver having clock recovery unit based on delay locked loop | |||
105 | 8576968 | TCP flow clock extraction | |||
106 | 8553824 | MIMO slotted aloha (MSA) system | |||
107 | 8548111 | Sampler circuit | |||
108 | 8532240 | Decoupling sampling clock and error clock in a data eye | |||
109 | 8494567 | Method for selecting an effective angle of reception of a directional antenna of a receiver node, corresponding storage means and receiver node | |||
110 | 8488732 | Communication receiver and a receiving method | |||
111 | 8477896 | Structure for window comparator circuit for clock data recovery from bipolar RZ data | |||
112 | 8477855 | Signal transmission system and semiconductor integrated circuit device | |||
113 | 8451867 | Network time protocol precision timestamping service | |||
114 | 8437439 | Signal processing apparatus, signal transmitting system, and signal processing method | |||
115 | 8416905 | Digital NRZI signal for serial interconnect communications between the link layer and physical layer | |||
116 | 8406362 | Communication device | |||
117 | 8385493 | Method and apparatus for improving linearity in clock and data recovery systems | |||
118 | 8385492 | Receiver circuit architectures | |||
119 | 8363769 | Sync detector and communication apparatus synthesizing correlation values | |||
120 | 8358939 | Optical communication device | |||
2012 | |||||
121 | 8340239 | Decoder and method for adaptively generating a clock window | |||
122 | 8340238 | Receiving device for receiving time-multiplexed signals, transmitting system, and method for time synchronization of time-multiplexed signals | |||
123 | 8331517 | Serial link receiver and method thereof | |||
124 | 8325868 | Synchronization apparatus for accurately demodulating signal input to PJM tag and PJM tag including the synchronization apparatus | |||
125 | 8320301 | MIMO WLAN system | |||
126 | 8315348 | Clock extraction circuit for use in a linearly expandable broadcast router | |||
127 | 8315347 | I/O link with configurable forwarded and derived clocks | |||
128 | 8311175 | TDD communication apparatus and operation method thereof | |||
129 | 8295423 | System and method for clockless data recovery | |||
130 | 8295422 | Code controller | |||
131 | 8291255 | CDR control architecture for robust low-latency exit from the power-saving mode of an embedded CDR in a programmable integrated circuit device | |||
132 | 8290105 | Signal reception device and method of signal reception timing detection | |||
133 | 8284879 | Lossless transfer of events across clock domains | |||
134 | 8275085 | Apparatus and method for recovering data | |||
135 | 8269565 | Spread spectrum clock generators and electronic devices including the same | |||
136 | 8265178 | Methods and apparatus for signal and timing detection in wireless communication systems | |||
137 | 8249207 | Clock and data recovery sampler calibration | |||
138 | 8233576 | System, apparatus, and method for a robust synchronization scheme for digital communication systems | |||
139 | 8233553 | Digital broadcast demodulator and digital broadcast demodulation method for suppressing degradation of reception characteristics | |||
140 | 8218703 | Methods of processing a wireless communication signal, wireless communication synchronization methods, and a radio frequency identification device communication method | |||
141 | 8184758 | Method and apparatus for detecting electrical idle | |||
142 | 8184735 | Sphere decoding method applied to multi-input multi-output (MIMO) channel | |||
143 | 8180008 | Single wire transmission without clock synchronization | |||
144 | 8170168 | Clock data recovery circuit | |||
145 | 8144802 | Digital data encoding and decoding method and system | |||
146 | 8130890 | Semiconductor memory device having data clock training circuit | |||
147 | 8130889 | Receive timing manager | |||
148 | 8094767 | Method and apparatus for timing and/or frequency synchronization in an RF receiver | |||
2011 | |||||
149 | 8081725 | Edge evaluation of ASK-modulated signals | |||
150 | 8077820 | Detection of frequency correction bursts and the like | |||
151 | 8073089 | Data player and data play method | |||
152 | 8068572 | Self-timing method for adjustment of a sampling phase in an oversampling receiver and circuit | |||
153 | 8068553 | System and method for evaluating performance of a MIMO antenna system | |||
154 | 8060665 | Integrated circuit input/output interface with empirically determined delay matching | |||
155 | 8045667 | Deserializer and data recovery method | |||
156 | 8040988 | Transceiver with selectable data rate | |||
157 | 8014483 | Method of acquiring initial synchronization in impulse wireless communication and receiver | |||
158 | 8009784 | Clock embedded differential data receiving system for ternary lines differential signaling | |||
159 | 8000402 | System and method for accelerated performance of quadrature amplitude modulation (QAM) decoding operations in a processor | |||
160 | 8000351 | Source synchronous link with clock recovery and bit skew alignment | |||
161 | 7995693 | Method and apparatus for serial communication using clock-embedded signals | |||
162 | 7992174 | Method and system for downstream time stamp in an adaptive modulation based satellite modem termination system | |||
163 | 7991101 | Multiple channel synchronized clock generation scheme | |||
164 | 7991100 | Method for the synchronization of a radio receiver, and adapted receiver for the implementation of said method | |||
165 | 7978800 | Circuit for converting a transponder controller chip output into an appropriate input signal for a host device | |||
166 | 7970090 | Method and apparatus for a self-synchronizing system | |||
167 | 7936855 | Oversampling data recovery circuit and method for a receiver | |||
168 | 7929654 | Data sampling circuit and method for clock and data recovery | |||
169 | 7925913 | CDR control architecture for robust low-latency exit from the power-saving mode of an embedded CDR in a programmable integrated circuit device | |||
170 | 7924962 | Clock regeneration circuit technical field | |||
171 | 7894562 | Data message sync pattern | |||
2010 | |||||
172 | 7844020 | Transmission system, transmitter, receiver, and transmission method | |||
173 | 7839966 | Asynchronous data sampling using CDR receivers in lock-to-reference mode | |||
174 | 7817762 | Method and apparatus for detecting leading pulse edges | |||
175 | 7801203 | Clock and data recovery circuits | |||
176 | 7787500 | Packet receiving method and device | |||
177 | 7782988 | Digital frequency synthesizer | |||
178 | 7760835 | Wireless communications devices, methods of processing a wireless communication signal, wireless communication synchronization methods and a radio frequency identification device communication method | |||
179 | 7746936 | Method and device for optimizing codebook for quantized precoder by using steepest descent algorithm | |||
180 | 7724858 | Techniques to manage latency for multiple receivers | |||
181 | 7684510 | Apparatus and method for transmission which encoding a message with space-time tubo code using feedback bit in mobile communication system | |||
182 | 7680228 | Communication system, real-time control device, and information processing system | |||
183 | 7672413 | Reception data synchronizing apparatus and method, and recording medium with recorded reception data synchronizing program | |||
184 | 7668609 | Digital audio data receiver without synchronized clock generator | |||
185 | 7653160 | Method of estimating noise and interference covariance matrix, receiver, and radio system | |||
186 | 7643597 | Methods for selecting a subsequence of video frames from a sequence of video frames | |||
2009 | |||||
187 | 7639764 | Method and apparatus for synchronizing data between different clock domains in a memory controller | |||
188 | 7613265 | Systems, methods and computer program products for high speed data transfer using an external clock signal | |||
189 | 7599457 | Clock-and-data-recovery system having a multi-phase clock generator for one or more channel circuits | |||
190 | 7590087 | Methods for wireless data transmission between a base station and one or more transponders | |||
191 | 7570684 | Method for joint time synchronization and frequency offset estimation in OFDM system and apparatus of the same | |||
192 | 7564936 | Process and electronic decoding circuit for a diphase asynchronous frame whose length is not known in advance, corresponding application, computer programme and storage means | |||
193 | 7561652 | High frequency spread spectrum clock generation | |||
194 | 7561633 | System and method for MIMO equalization for DSP transceivers | |||
195 | 7561582 | Data reception device | |||
196 | 7555087 | Clock data recovery circuitry with dynamic support for changing data rates and a dynamically adjustable PPM detector | |||
197 | 7542535 | Method and apparatus for recovering a clock signal | |||
198 | 7522640 | Method of avoiding synchronization between communicating nodes | |||
199 | 7515665 | GFSK/GMSK detector with enhanced performance in co-channel interference and AWGN channels | |||
200 | 7515643 | Modulation for broadcasting from multiple transmitters | |||
201 | 7515614 | Source synchronous link with clock recovery and bit skew alignment | |||
202 | 7505541 | NRZ/PAM-4/PRML triple mode phase and data detector | |||
203 | 7489754 | Frequency-lock detector | |||
204 | 7489735 | Apparatus and method for processing signals from recording medium | |||
205 | 7477713 | method for providing automatic adaptation to frequency offsets in high speed serial links | |||
206 | 7477712 | Adaptable data path for synchronous data transfer between clock domains | |||
2008 | |||||
207 | 7466783 | Method and system to implement a double data rate (DDR) interface | |||
208 | 7453970 | Clock signal selecting apparatus and method that guarantee continuity of output clock signal | |||
209 | 7450658 | Apparatus of transmitter and receiver for MIMO MC-CDMA system | |||
210 | 7434084 | Method and apparatus for eliminating sampling errors on a serial bus | |||
211 | 7424077 | Jitter sensitive maximum-a-posteriori sequence detection | |||
212 | 7424076 | System and method for providing synchronization information to a receiver | |||
213 | 7421039 | Method and system employing antenna arrays | |||
214 | 7398333 | Integrated circuit input/output interface with empirically determined delay matching | |||
215 | 7397879 | Data communication method and data communication device and semiconductor device | |||
216 | 7397878 | Data communication method and data communication device and semiconductor device | |||
217 | 7397876 | Methods and arrangements for link power reduction | |||
218 | 7382845 | Distribution of synchronization in an ethernet local area network environment | |||
219 | 7372931 | Unit interval discovery for a bus receiver | |||
220 | 7362837 | Method and apparatus for clock deskew | |||
221 | 7359472 | Method and apparatus for wireless data transmission | |||
222 | 7359471 | Data communication method and data communication device and semiconductor device | |||
223 | 7359470 | Minimizing feedback rate for channel state information in MIMO systems | |||
224 | 7353418 | Method and apparatus for updating serial devices | |||
225 | 7352835 | Clock data recovery circuitry with dynamic support for changing data rates and a dynamically adjustable PPM detector | |||
226 | 7342969 | Signaling with multiple clocks | |||
227 | 7321617 | Data communication system with self-test feature | |||
228 | 7317489 | Teletext data detection by data content based synchronization and error reduction | |||
2007 | |||||
229 | 7310400 | Data recovery device and method | |||
230 | 7289589 | Maximum likelihood bit synchronizer and data detector | |||
231 | 7287105 | Asynchronous-mode sync FIFO having automatic lookahead and deterministic tester operation | |||
232 | 7274230 | System and method for clockless data recovery | |||
233 | 7272202 | Communication system and method for generating slave clocks and sample clocks at the source and destination ports of a synchronous network using the network frame rate | |||
234 | 7245684 | System and method for compensating for skew between a first clock signal and a second clock signal | |||
235 | 7245683 | System and methods of recovering a clock from NRZ data | |||
236 | 7242735 | Data recovery system and the method thereof | |||
237 | 7242734 | Frame boundary discriminator | |||
238 | 7236555 | Method and apparatus for measuring jitter | |||
239 | 7221725 | Host interface data receiver | |||
240 | 7218684 | Method and system for code reuse and capacity enhancement using null steering | |||
241 | 7209530 | Multi-shelf system clock synchronization | |||
242 | 7206353 | Mobile communication apparatus including an antenna array and mobile communication method | |||
243 | 7190192 | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines | |||
244 | 7177306 | Calculation of clock skew using measured jitter buffer depth | |||
245 | 7170947 | Data receiver | |||
246 | 7167534 | Oversampling clock recovery circuit applicable not only to high rate data but also to low rate data | |||
247 | 7161998 | Digital phase locked loop for regenerating the clock of an embedded signal | |||
2006 | |||||
248 | 7154946 | Equalizer and equalization method for return-to-zero signals | |||
249 | 7151811 | Electric circuit for decoding a two-phase asynchronous data signal and corresponding decoding method, device for controlling equipment | |||
250 | 7145973 | Receiver and method of reception with low sensitivity to fading | |||
251 | 7139345 | Method and circuit for adjusting the timing of output data based on the current and future states of the output data | |||
252 | 7136424 | Method or communications system using a robust diversity combination | |||
253 | 7133482 | Decoding method and Manchester decoder | |||
254 | 7127018 | Apparatus for and method of measuring clock skew | |||
255 | 7126383 | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines | |||
256 | 7113562 | Method and apparatus for receiving data based on tracking zero crossings | |||
257 | 7103126 | Method and circuit for adjusting the timing of output data based on the current and future states of the output data | |||
258 | 7082142 | System and method for delivering content in a unicast/multicast manner | |||
259 | 7076012 | Measure-controlled delay circuit with reduced playback error | |||
260 | 7068747 | Data decision circuit using clock signal which has phase optimized with respect to phase of input data signal | |||
261 | 7058837 | Method and system for providing a message-time-ordering facility | |||
262 | 7046754 | Method for establishing a communication link | |||
263 | 7042971 | Delay-locked loop with built-in self-test of phase margin | |||
264 | 7035367 | Fractional multi-modulus prescaler | |||
265 | 7035365 | Error correction method and apparatus for data transmission system | |||
266 | 7009428 | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines | |||
267 | 6999891 | Independent deskew lane | |||
268 | 6990162 | Scalable clock distribution for multiple CRU on the same chip | |||
269 | 6990123 | Method and apparatus for redundant transmission over TDMA optical networks | |||
270 | 6987824 | Method and system for clock/data recovery for self-clocked high speed interconnects | |||
2005 | |||||
271 | 6968025 | High-speed transmission system having a low latency | |||
272 | 6965617 | Resynchronous control apparatus of subscriber communication machine, and resynchronizing method | |||
273 | 6961397 | Symbol synchronizer for impulse noise channels | |||
274 | 6961371 | Cellular communications system receivers | |||
275 | 6961095 | Digital display jitter correction apparatus and method | |||
276 | 6959038 | High-speed decoder for a multi-pair gigabit transceiver | |||
277 | 6959012 | Apparatus for compensating for phase difference attendant upon time division multiplexing and method thereof | |||
278 | 6956918 | Method for bi-directional data synchronization between different clock frequencies | |||
279 | 6954869 | Methods and apparatus for clock domain conversion in digital processing systems | |||
280 | 6952461 | Sampling frequency conversion apparatus | |||
281 | 6949958 | Phase comparator capable of tolerating a non-50% duty-cycle clocks | |||
282 | 6947482 | System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system | |||
283 | 6944237 | Multi-pair transceiver decoder system with low computation slicer | |||
284 | 6943595 | Synchronization circuit | |||
285 | 6940927 | Simplified symbol timing tracking circuit for a CPM modulated signal | |||
286 | 6937679 | Spread spectrum clocking tolerant receivers | |||
287 | 6931561 | Apparatus and method for asynchronously interfacing high-speed clock domain and low-speed clock domain using a plurality of storage and multiplexer components | |||
288 | 6930628 | Amplitude detection for controlling the decision instant for sampling as a data flow | |||
289 | 6928106 | Phy control module for a multi-pair gigabit transceiver | |||
290 | 6928018 | Dynamic register with low clock rate testing capability | |||
291 | 6927709 | Transmission and reception interface and method of data transmission | |||
292 | 6927565 | Dynamic register with IDDQ testing capability | |||
293 | 6925575 | Selectable clocking synchronization of a parallel-to-serial converter and memory | |||
294 | 6922440 | Adaptive signal latency control for communications systems signals | |||
295 | 6917657 | Reduced MIPS pulse shaping filter | |||
296 | 6912259 | Interpolation synchronous detection method and radio communication system | |||
297 | 6912099 | Maximum likelihood detection of asynchronous servo data employing interpolation | |||
298 | 6910144 | Method and configuration for generating a clock pulse in a data processing system having a number of data channels | |||
299 | 6906555 | Prevention of metastability in bistable circuits | |||
300 | 6904111 | Asynchronous resampling for data transport | |||
301 | 6904104 | Technique for demodulating a linear modulated data signal in a communications system | |||
302 | 6904084 | Read channel apparatus and method for an optical storage system | |||
303 | 6901127 | Method and apparatus for data recovery | |||
304 | 6901106 | Delay lock code tracking loop employing multiple timing references | |||
305 | 6900665 | Transfer of digital data across asynchronous clock domains | |||
306 | 6898256 | Synchronization method and apparatus | |||
307 | 6891910 | Baud-rate timing recovery | |||
308 | 6888886 | Interface apparatus and method for receiving serially-transmitted data | |||
309 | 6885228 | Non-iterative signal synchronization | |||
310 | 6882661 | System for detection of asynchronous packet rates and maintenance of maximum theoretical packet rate | |||
311 | 6882192 | High-speed data buffer | |||
312 | 6879646 | Quadrature amplitude modulation demodulator and receiver | |||
313 | 6879623 | Method and apparatus for timing recovery in a communication device | |||
314 | 6870879 | Interpolation filter circuit | |||
315 | 6868127 | Signal receiving circuit and signal receiving method | |||
316 | 6865234 | Pair-swap independent trellis decoder for a multi-pair gigabit transceiver | |||
317 | 6865189 | Minimal latency serial media independent interface to media independent interface converter | |||
318 | 6856655 | Timing recovery device and method for telecommunications systems | |||
319 | 6853695 | System and method for deriving symbol timing | |||
320 | 6850576 | Method and apparatus for reproducing timing, and a demodulating apparatus that uses the method and apparatus for reproducing timing | |||
321 | 6847694 | Method for determining the sampling phase and method for synchronization word detection using the phase detection method | |||
322 | 6845134 | Arrangement for receiving a digital signal from a transmission medium | |||
323 | 6839860 | Capture clock generator using master and slave delay locked loops | |||
2004 | |||||
324 | 6836511 | Apparatus for processing a reproduced digital signal | |||
325 | 6834255 | Timing control means for automatic compensation of timing uncertainties | |||
326 | 6826390 | Receiver, transceiver circuit, signal transmission method, and signal transmission system | |||
327 | 6823029 | System for managing signals in different clock domains and a programmable digital filter | |||
328 | 6816684 | Method of generating a clock signal of exact phase from an optical input signal and optical receiver therefor | |||
329 | 6813723 | Method of compensating for delay between clock signals | |||
330 | 6810484 | Device and method for clock synchronization through extraction of data at frequency distinct from data rate of USB interface | |||
331 | 6807228 | Dynamic regulation of power consumption of a high-speed communication system | |||
332 | 6803970 | Digital television receiver with match filter responsive to field synchronization code | |||
333 | 6798856 | Automatic clock tuning method, automatic clock tuning control system and apparatus having automatic clock tuning function | |||
334 | 6795510 | Apparatus and method for symbol timing recovery | |||
335 | 6788749 | Erasure based instantaneous loop control in a data receiver | |||
336 | 6782058 | Device and method for interpolated signal resampling between sampling clock cycles | |||
337 | 6778620 | Method and an arrangement for preventing metastability | |||
338 | 6778602 | Multi-pair gigabit ethernet transceiver | |||
339 | 6775755 | Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same | |||
340 | 6771725 | Multi-pair gigabit ethernet transceiver | |||
341 | 6771718 | Method for frequency error estimation | |||
342 | 6771713 | Data aided carrier phase tracking system for precoded continuous phase modulated signals | |||
343 | 6760574 | Two-dimensional signal detector with dynamic timing phase compensation | |||
344 | 6757348 | High-speed coordinated multi-channel elastic buffer | |||
345 | 6756819 | Synchronization circuit | |||
346 | 6753796 | Conversion circuit for burst signals referencing to various clocks and method for the same | |||
347 | 6747826 | Clock recovery apparatus | |||
348 | 6744837 | Clock switching circuit | |||
349 | 6744835 | Methods and apparatus for implementing an interpolation finite impulse response (FIR) filter for use in timing recovery | |||
350 | 6744833 | Data resynchronization between modules sharing a common clock | |||
351 | 6738608 | Frequency-timing control loop for wireless communication systems | |||
352 | 6738442 | Pulse detection and synchronization system | |||
353 | 6738419 | Dynamic regulation of power consumption of a high-speed communication system | |||
354 | 6737859 | Dynamic register with IDDQ testing capability | |||
355 | 6731914 | Determination of transmitter distortion | |||
356 | 6731697 | Symbol timing recovery method for low resolution multiple amplitude signals | |||
357 | 6731691 | Multi-pair gigabit ethernet transceiver having adaptive disabling of circuit elements | |||
358 | 6725388 | Method and system for performing link synchronization between two clock domains by inserting command signals into a data stream transmitted between the two clock domains | |||
359 | 6724847 | Feed-forward symbol synchronizer and methods of operation therefor | |||
360 | 6724846 | Simple, high performance, bit-sliced mesochronous synchronizer for a source synchronous link | |||
361 | 6724683 | Transferring data between different clock domains | |||
362 | 6721916 | System and method for trellis decoding in a multi-pair transceiver system | |||
363 | 6714612 | Method and device for synchronization of phase mismatch in communication systems employing a common clock period | |||
364 | 6711222 | Method and apparatus for performing frequency synthesis in communication systems | |||
365 | 6708235 | Multi-modem implementation with host based and digital signal processor based modems | |||
366 | 6707868 | Apparatus for recovering timing of a digital signal for a transceiver | |||
367 | 6707848 | Demodulator for a multi-pair gigabit transceiver | |||
368 | 6704373 | Timing recovery circuit and method in automatic equalizer | |||
369 | 6690749 | High speed encoding and decoding apparatus and method for analog subscriber connections | |||
370 | 6690201 | Method and apparatus for locating data transition regions | |||
371 | 6687292 | Timing phase acquisition method and device for telecommunications systems | |||
372 | 6680988 | Non-linear extraction circuit and clock extraction circuit | |||
373 | 6680982 | Jitter-tolerant signal receiver and method of designing the same | |||
374 | 6674822 | Searching the optimal sampling instant in a TDMA packet transmission system | |||
2003 | |||||
375 | 6671753 | Elastic interface apparatus and method therefor | |||
376 | 6671334 | Measurement receiver demodulator | |||
377 | 6671325 | Wireless infrared digital audio system | |||
378 | 6671244 | Information detecting circuit including adaptive equalizer and reproducing apparatus | |||
379 | 6665359 | Digital data separator | |||
380 | 6662000 | Synchronisation method and device for a communication receiver | |||
381 | 6661727 | Dynamic register with low clock rate testing capability | |||
382 | 6658242 | TDMA wireless telephone system with independently tracked demodulation parameters | |||
383 | 6658073 | Method and system for reducing jitter on constant rate data transfer between asynchronous systems | |||
384 | 6654413 | Phase synchronization method for extended partial response, and phase synchronization circuit and read channel circuit using this method | |||
385 | 6650699 | Methods and apparatus for timing recovery from a sampled and equalized data signal | |||
386 | 6647444 | Data synchronization interface | |||
387 | 6646991 | Multi-link extensions and bundle skew management | |||
388 | 6636575 | Cascading PLL units for achieving rapid synchronization between digital communications systems | |||
389 | 6628736 | Estimating the optimal sampling instant in a TDMA packet transmission system | |||
390 | 6624766 | Recovery and transmission of return-to-zero formatted data using non-return-to-zero devices | |||
391 | 6624668 | Digitally programmable phase-lock loop for high-speed data communications | |||
392 | 6618458 | Method and apparatus for signal receiving synchronization | |||
393 | 6603368 | High data rate vector demodulator | |||
394 | 6603336 | Signal duration representation by conformational clock cycles in different time domains | |||
395 | 6600793 | Minimal overhead early late timing recovery | |||
396 | 6600778 | Method and apparatus for VSB symbol sync recovery | |||
397 | 6594329 | Elastic buffer | |||
398 | 6594325 | Circuitry, architecture and method(s) for synchronizing data | |||
399 | 6593805 | Demodulation apparatus | |||
400 | 6590948 | Parallel asynchronous sample rate reducer | |||
401 | 6590872 | Receiver with parallel correlator for acquisition of spread spectrum digital transmission | |||
402 | 6584536 | Bus transaction accelerator for multi-clock systems | |||
403 | 6584162 | Method and apparatus sample rate conversions in an analog to digital converter | |||
404 | 6584145 | Sample rate converter | |||
405 | 6581114 | Method and system for synchronizing serial data | |||
406 | 6580773 | Method and device for aligning synchronous digital signals | |||
407 | 6577685 | Programmable digital signal processor for demodulating digital television signals | |||
408 | 6567489 | Method and circuitry for acquiring a signal in a read channel | |||
409 | 6567480 | Method and apparatus for sampling timing adjustment and frequency offset compensation | |||
410 | 6563897 | Multirate symbol timing recovery circuit | |||
411 | 6563894 | Method and apparatus for acquiring and tracking the sampling phase of a signal | |||
412 | 6563333 | Dynamic register with IDDQ testing capability | |||
413 | 6560716 | System for measuring delay of digital signal using clock generator and delay unit wherein a set of digital elements of clock generator identical to a set of digital elements of delay unit | |||
414 | 6560276 | Synchronization techniques using an interpolation filter | |||
415 | 6560053 | Clock recovery apparatus | |||
416 | 6556633 | Timing recovery for data sampling of a detector | |||
417 | 6553087 | Interpolating bandpass filter for packet-data receiver synchronization | |||
418 | 6549595 | High-speed serial data communication system | |||
419 | 6549593 | Interface apparatus for interfacing data to a plurality of different clock domains | |||
420 | 6545532 | Timing recovery circuit in a QAM demodulator | |||
421 | 6535946 | Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock | |||
422 | 6535565 | Receiver rate converter phase calculation apparatus and method | |||
423 | 6532259 | Equalization method and apparatus with gain adjustment for direct access storage device (DASD) data channels | |||
424 | 6529886 | Authenticating method for an access and/or payment control system | |||
425 | 6529570 | Data synchronizer for a multiple rate clock source and method thereof | |||
426 | 6529549 | System and method for an equalizer-based symbol timing loop | |||
427 | 6526106 | Synchronous circuit controller for controlling data transmission between asynchrous circuit | |||
428 | 6525577 | Apparatus and method for reducing skew of a high speed clock signal | |||
429 | 6519301 | Circuits, systems, and methods for passing request information across differing clock domains | |||
430 | 6516420 | Data synchronizer using a parallel handshaking pipeline wherein validity indicators generate and send acknowledgement signals to a different clock domain | |||
431 | 6516036 | Method and apparatus for decimating an oversampled signal | |||
432 | 6512473 | Clock synchronizing circuit | |||
433 | 6510182 | Wireless infrared digital audio system | |||
2002 | |||||
434 | 6501811 | Sampling system | |||
435 | 6499087 | Synchronous memory sharing based on cycle stealing | |||
436 | 6498568 | Pipeline communication system | |||
437 | 6493396 | Phase shift key burst receiver having improved phase resolution and timing and data recovery | |||
438 | 6487263 | Decoding of a biphase modulated bitstream and relative self-synchronizing frequency divider with noninteger ratio | |||
439 | 6487262 | Synchronization and downconversion in TDM/TDMA systems | |||
440 | 6477215 | Sampling control loop for a receiver for digitally transmitted signals | |||
441 | 6477200 | Multi-pair gigabit ethernet transceiver | |||
442 | 6477199 | Dynamic regulation of power consumption of a high-speed communication system | |||
443 | 6477177 | Multiple device access to serial data stream | |||
444 | 6473439 | Method and apparatus for fail-safe resynchronization with minimum latency | |||
445 | 6473131 | System and method for sampling an analog signal level | |||
446 | 6467043 | Adjusting and measuring the timing of a data strobe signal with a first delay line and through additional delay line adapted to receive pulse signal | |||
447 | 6466589 | Apparatus for verifying data integrity and synchronizing ATM cell data format for processing | |||
448 | 6463110 | Timing synchronization in a communication device | |||
449 | 6462851 | Network and method for transmitting reverse analog signals by sub-sampling the digital reverse bandwidth | |||
450 | 6462594 | Digitally programmable phase-lock loop for high-speed data communications | |||
451 | 6459746 | Multi-pair gigabit ethernet transceiver | |||
452 | 6459730 | Apparatus for, and method of, processing signals transmitted over a local area network | |||
453 | 6456552 | Dynamic register with low clock rate testing capability | |||
454 | 6452948 | Method for baud-clock phase synchronization in a TDMA digital communications system and apparatus therefor | |||
455 | 6442223 | Method and system for data transfer | |||
456 | 6438567 | Method for selective filtering | |||
457 | 6434684 | Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same | |||
458 | 6433600 | Method and apparatus for glitch protection for input buffers in a source-synchronous environment | |||
459 | 6430235 | Non-data-aided feedforward timing synchronization method | |||
460 | 6424688 | Method to transfer data in a system with multiple clock domains using clock skipping techniques | |||
461 | 6424189 | Apparatus and system for multi-stage event synchronization | |||
462 | 6418176 | Forwarded clock recovery with variable latency | |||
463 | 6414990 | Timing recovery for a high speed digital data communication system based on adaptive equalizer impulse response characteristics | |||
464 | 6411650 | PLL control method in data receiving apparatus | |||
465 | 6411117 | Dynamic register with IDDQ testing capability | |||
466 | 6400770 | High speed encoding and decoding methods for analog subscriber connections | |||
467 | 6400646 | Method for compensating for remote clock offset | |||
468 | 6396888 | Digital data transmission system | |||
469 | 6389064 | Modems, methods, and computer program products for identifying a signaling alphabet in variance with an ideal alphabet due to digital impairments | |||
470 | 6385263 | Method and apparatus for accomplishing high bandwidth serial communication between semiconductor devices | |||
471 | 6381291 | Phase detector and method | |||
472 | 6377634 | Circuit for reproducing bit timing and method of reproducing bit timing | |||
473 | 6374312 | System for dedicating a host processor to running one of a plurality of modem programs and dedicating a DSP to running another one of the modem programs | |||
474 | 6373911 | Bit synchronization circuit | |||
475 | 6373900 | Multi-pair transceiver decoder system with low computation slicer | |||
476 | 6370600 | Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency | |||
477 | 6370200 | Delay adjusting device and method for plural transmission lines | |||
478 | 6366629 | Method of estimating timing phase and rate offsets in digital data | |||
479 | 6363129 | Timing recovery system for a multi-pair gigabit transceiver | |||
480 | 6359943 | Asynchronous data receiving circuit and method | |||
481 | 6356609 | Method of transmitting a coded control signal between asynchronous assemblies | |||
482 | 6346836 | Synchronizing stage | |||
483 | 6341147 | Maximum likelihood symbol timing estimator | |||
484 | 6335955 | Connection, system and method of phase delayed synchronization in high speed digital systems using delay elements | |||
485 | 6335949 | Non-linear signal receiver | |||
2001 | |||||
486 | 6334163 | Elastic interface apparatus and method therefor | |||
487 | 6329858 | Control method and control system for signal transmission | |||
488 | 6324225 | Timing recovery for data sampling of a detector | |||
489 | 6314499 | Non-preemptive memory locking mechanism in a shared resource system | |||
490 | 6314485 | Automatic status register | |||
491 | 6314148 | Synchronization tracking method | |||
492 | 6314145 | Tracking carrier timing | |||
493 | 6314133 | Automatic equalizer capable of surely selecting a suitable sample timing a method for generating sampling clock used for the sample timing and a recording medium usable in control of the automatic equalizer | |||
494 | 6307905 | Switching noise reduction in a multi-clock domain transceiver | |||
495 | 6295325 | Fixed clock based arbitrary symbol rate timing recovery loop | |||
496 | 6295290 | Telecommunications systems | |||
497 | 6289047 | Dynamic regulation of power consumption of a high-speed communication system | |||
498 | 6288656 | Receive deserializer for regenerating parallel data serially transmitted over multiple channels | |||
499 | 6285724 | Receiving apparatus for decoding serial signal into information signal and communication system with the receiving apparatus | |||
500 | 6285722 | Method and apparatus for variable bit rate clock recovery | |||
501 | 6285403 | Data slice circuit for slicing data carried on a video signal and a method thereof | |||
502 | 6282248 | Variable baud rate demodulator | |||
503 | 6279066 | System for negotiating access to a shared resource by arbitration logic in a shared resource negotiator | |||
504 | 6279048 | System wake-up based on joystick movement | |||
505 | 6278741 | Timing recovery circuit in QAM modems | |||
506 | 6275948 | Processor powerdown operation using intermittent bursts of instruction clock | |||
507 | 6275548 | Timing recovery system | |||
508 | 6275519 | Frame synchronization in a digital communications system | |||
509 | 6272192 | Method and apparatus for transmit timing adjustment in a host-processor-based modem | |||
510 | 6272186 | Normal burst acquisition system for use in a cellular communications network | |||
511 | 6272173 | Efficient fir filter for high-speed communication | |||
512 | 6269136 | Digital differential analyzer data synchronizer | |||
513 | 6269128 | Clock recovery control in differential detection | |||
514 | 6268767 | Dual bit error rate estimation in a QAM demodulator | |||
515 | 6266751 | Continuously sliding window method and apparatus for sharing single-ported memory banks between two agents | |||
516 | 6266377 | Method of timing recovery convergence monitoring in modems | |||
517 | 6266365 | CDMA receiver | |||
518 | 6266172 | Signal bit rate and performance measurement for optical channel signals | |||
519 | 6263034 | Circuit and technique for digital reduction of jitter transfer | |||
520 | 6263032 | Phase detector estimator | |||
521 | 6263013 | Fast tracking of PN synchronization in a direct-sequence spread-spectrum digital communications system | |||
522 | 6262998 | Parallel data bus integrated clocking and control | |||
523 | 6256337 | Rapid acquisition of PN synchronization in a direct-sequence spread-spectrum digital communications system | |||
524 | 6256335 | Slow tracking of PN synchronization in a direct-sequence spread-spectrum digital communications system | |||
525 | 6253345 | System and method for trellis decoding in a multi-pair transceiver system | |||
526 | 6252919 | Re-synchronization of independently-clocked audio streams by fading-in with a fractional sample over multiple periods for sample-rate conversion | |||
527 | 6252904 | High-speed decoder for a multi-pair gigabit transceiver | |||
528 | 6249557 | Apparatus and method for performing timing recovery | |||
529 | 6249544 | System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system | |||
530 | 6249180 | Phase noise and additive noise estimation in a QAM demodulator | |||
531 | 6249179 | Direct digital synthesis in a QAM demodulator | |||
532 | 6246733 | Synchronous interface for asynchronous data detection channels | |||
533 | 6246276 | Clock signal cleaning circuit | |||
534 | 6240483 | System for memory based interrupt queue in a memory of a multiprocessor system | |||
535 | 6233294 | Method and apparatus for accomplishing high bandwidth serial communication between semiconductor devices | |||
536 | 6233284 | High speed communications system for analog subscriber connections | |||
537 | 6233275 | High speed communications system for analog subscriber connections | |||
538 | 6230215 | On-demand transfer engine | |||
539 | 6229862 | Selective clock recovery from portions of digital data signal best suited therefor | |||
540 | 6226726 | Memory bank organization correlating distance with a memory map | |||
541 | 6226661 | Generation and application of sample rate conversion ratios using distributed jitter | |||
542 | 6226332 | Multi-pair transceiver decoder system with low computation slicer | |||
543 | 6225926 | Intermittent digital demodulation apparatus having reduced waiting time period | |||
544 | 6222893 | Synchronizing circuit | |||
545 | 6219384 | Circuit for determining clock propagation delay in a transmission line | |||
546 | 6212246 | Symbol-quality evaluation in a digital communications receiver | |||
547 | 6212119 | Dynamic register with low clock rate testing capability | |||
548 | 6208481 | Gain and phase constrained adaptive equalizing filter in a sampled amplitude read channel for magnetic recording | |||
549 | 6205192 | Clock input control circuit | |||
550 | 6201831 | Demodulator for a multi-pair gigabit transceiver | |||
551 | 6198700 | Method and apparatus for retiming test signals | |||
552 | 6192091 | Circuit for reproducing a clock from a multilevel QAM signal | |||
553 | 6189076 | Shared synchronous memory with a switching circuit controlled by an arbiter and method for glitch free switching of a clock signal | |||
554 | 6185261 | Determination of transmitter distortion | |||
555 | 6178214 | Synchronizing system capable of certainly executing synchronizing operation | |||
556 | 6178212 | Retiming circuit and method for performing retiming | |||
557 | 6178198 | Apparatus for, and method of, processing signals transmitted over a local area network | |||
558 | 6175603 | System for managing signals in different clock domains and a programmable digital filter | |||
559 | 6175591 | Radio receiving apparatus | |||
560 | 6175257 | Integrated circuit comprising a master circuit working at a first frequency to control slave circuits working at a second frequency | |||
2000 | |||||
561 | 6163831 | Minimum refractory period in a multiple agent resource sharing environment | |||
562 | 6163584 | Synchronization element for converting an asynchronous pulse signal into a synchronous pulse signal | |||
563 | 6163550 | State dependent synchronization circuit which synchronizes leading and trailing edges of asynchronous input pulses | |||
564 | 6163545 | System and method for data transfer across multiple clock domains | |||
565 | 6161160 | Network interface device architecture for storing transmit and receive data in a random access buffer memory across independent clock domains | |||
566 | 6160443 | Dual automatic gain control in a QAM demodulator | |||
567 | 6157652 | Hub port with constant phase | |||
568 | 6154510 | Symbol timing recovery based on adjusted, phase-selected magnitude values | |||
569 | 6148037 | Sampling timing phase error detector for VSB modulation signal | |||
570 | 6144709 | Method of detecting a call set-up burst, and a receiver | |||
571 | 6141378 | Fractionally-spaced adaptively-equalized self-recovering digital receiver for amplitude-phase modulated signals | |||
572 | 6138244 | Timing recovery with minimum jitter movement | |||
573 | 6137851 | System and method for synchronizing a signal with respect to another signal | |||
574 | 6134285 | Asynchronous data receiving circuit and method | |||
575 | 6130920 | Method and apparatus for accurate synchronization using symbol decision feedback | |||
576 | 6130577 | Digital demodulators for phase modulated and amplitude-phase modulated signals | |||
577 | 6130566 | Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit | |||
578 | 6128357 | Data receiver having variable rate symbol timing recovery with non-synchronized sampling | |||
579 | 6128319 | Hybrid interface for packet data switching | |||
580 | 6122697 | System for extending the width of a data bus | |||
581 | 6122693 | PCI bus utilization diagnostic monitor | |||
582 | 6118833 | Fast acquisition method for obtaining data from a transmission channel and a data receiver for carrying out this method | |||
583 | 6118393 | EFM signal frame period detecting circuit, and system for controlling the frequency of the bit synchronizing clock signal used for reproducing the EFM signal | |||
584 | 6115433 | Adaptively-equalized digital receiver with carrier tracking | |||
585 | 6112307 | Method and apparatus for translating signals between clock domains of different frequencies | |||
586 | 6111922 | Circuit for detecting word sequences in a modem | |||
587 | 6111920 | Method and system for timing recovery in a baud-rate sampled data stream | |||
588 | 6104774 | Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit | |||
589 | 6104769 | Method and apparatus for acquiring and tracking the sampling phase of a signal | |||
590 | 6101230 | Sampling clock signal recovery device and method in receiving terminal of DMT system | |||
591 | 6097775 | Method and apparatus for synchronously transferring signals between clock domains | |||
592 | 6097769 | Viterbi detector using path memory controlled by best state information | |||
593 | 6097224 | Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit | |||
594 | 6088386 | Transmitter with phase rotor, modulator/demodulator, communication system and method performed thereby | |||
595 | 6087867 | Transaction control circuit for synchronizing transactions across asynchronous clock domains | |||
596 | 6085351 | Synchronization method | |||
597 | 6084447 | Pulse discriminating clock synchronizer for logic derived clock signals with synchronous clock suspension capability for a programmable device | |||
598 | 6081527 | Asynchronous transfer scheme using multiple channels | |||
599 | 6079035 | Parallel data skew detecting circuit | |||
600 | 6075408 | OQPSK phase and timing detection | |||
601 | 6066970 | Circuit for producing clock pulses from an inputted base band signal | |||
602 | 6061406 | Multichannel time shared demodulator and method | |||
603 | 6058150 | Method and apparatus for combined timing recovery, frame synchronization and frequency offset correction in a receiver | |||
604 | 6057730 | Digital demodulator | |||
605 | 6055284 | Symbol timing recovery circuit in digital demodulator | |||
606 | 6055119 | Adaptive signal processing method and circuit for a digital recording/reproducing apparatus | |||
607 | 6049575 | Digital communications system comprising a receiver that includes a timing recovery device | |||
608 | 6038264 | Data receiving apparatus | |||
609 | 6034998 | Method of and apparatus for detecting phase | |||
610 | 6028902 | Clock phase detecting circuit | |||
611 | 6016066 | Method and apparatus for glitch protection for input buffers in a source-synchronous environment | |||
1999 | |||||
612 | 6005730 | Signal error generating circuit for an analog signal processing channel | |||
613 | 6005729 | Analog signal processing circuit with integrated gain and timing error signal processing | |||
614 | 6002730 | Method for detecting data and device therefor of data storing unit | |||
615 | 6002712 | Timing phase control apparatus and timing phase control method | |||
616 | 6002710 | Timing recovery for a pseudo-random noise sequence in a direct-sequence spread-spectrum communications system | |||
617 | 6002709 | Verification of PN synchronization in a direct-sequence spread-spectrum digital communications system | |||
618 | 6002274 | Oversampled state machine for jitter tolerant pulse detection | |||
619 | 5999355 | Gain and phase constrained adaptive equalizing filter in a sampled amplitude read channel for magnetic recording | |||
620 | 5995563 | System and method for fast channel switching in a satellite receiver | |||
621 | 5991347 | Symbol timing recovery circuit for a base band communication system using a plurality of channels | |||
622 | 5990813 | Method and apparatus for synchronizing external data to an internal timing signal | |||
623 | 5987083 | Signal transmission apparatus with a plurality of LSIS | |||
624 | 5987081 | Method and apparatus for a testable high frequency synchronizer | |||
625 | 5987077 | Method of synchronizing a digital signal receiver | |||
626 | 5982826 | Synchronous clock regeneration system for generating a clock waveform at a specified frequency | |||
627 | 5974102 | Synchronizing circuit | |||
628 | 5970093 | Fractionally-spaced adaptively-equalized self-recovering digital receiver for amplitude-Phase modulated signals | |||
629 | 5966413 | Digital demodulator and method of operation | |||
630 | 5966408 | Method and device for regenerating by maxima detection, a clock signal punctuating the transmission of received digitized signals | |||
631 | 5959563 | Analogue to digital converter with adaptive sample timing based on statistics of sample values | |||
632 | 5956374 | Jitter suppressing circuit | |||
633 | 5953521 | Data-pattern induced skew reducer | |||
634 | 5952857 | Semiconductor integrated circuit achieving reliable data latching | |||
635 | 5949266 | Enhanced flip-flop for dynamic circuits | |||
636 | 5943369 | Timing recovery system for a digital signal processor | |||
637 | 5942994 | Method and device for decoding a multivalent electrical signal and receiver comprising such a decoding device | |||
638 | 5940449 | Signal processing system for digital signals | |||
639 | 5940437 | System and method for reducing the peak load on the processor of a block processing modem | |||
640 | 5940435 | Method for compensating filtering delays in a spread-spectrum receiver | |||
641 | 5933467 | Multirate receive device and method using a single adaptive interpolation filter | |||
642 | 5933452 | Timing interpolator in digital demodulator | |||
643 | 5933433 | Method and system for reception timing control | |||
644 | 5933053 | Burst demodulator | |||
645 | 5930231 | Block spectrum receiver for a broadband communications system | |||
646 | 5929676 | Asynchronous pulse discriminating synchronizing clock pulse generator for logic derived clock signals for a programmable device | |||
647 | 5920577 | Digital signal processing method and apparatus | |||
648 | 5920220 | Clock timing recovery methods and circuits | |||
649 | 5919265 | Source synchronization data transfers without resynchronization penalty | |||
650 | 5909563 | Computer system including an interface for transferring data between two clock domains | |||
651 | 5909332 | Sampled amplitude read channel employing interpolated timing recovery | |||
652 | 5905391 | Master-slave delay locked loop for accurate delay or non-periodic signals | |||
653 | 5898741 | Delayed detection MRC diversity circuit | |||
654 | 5892803 | Determination of symbol sample timing using soft decisions | |||
655 | 5892792 | 12-chip coded spread spectrum modulation for direct conversion radio architecture in a digital cordless telephone | |||
656 | 5892632 | Sampled amplitude read channel employing a residue number system FIR filter in an adaptive equalizer and in interpolated timing recovery | |||
657 | 5892474 | Clock phase acquisition/tracking device and phase acquisition method | |||
658 | 5881110 | Carrier phase synchronization by reverse playback | |||
659 | 5878097 | Signal processing delay circuit | |||
660 | 5878096 | Digital filter having phase-adjustment ability | |||
661 | 5878088 | Digital variable symbol timing recovery system for QAM | |||
662 | 5872959 | Method and apparatus for parallel high speed data transfer | |||
663 | 5872818 | Apparatus for recovering full digital symbol timing | |||
664 | 5870594 | Data transfer system and method | |||
665 | 5870446 | Mechanism for automatically adjusting the phase of a transmission strobe clock signal to correct for misalignment of transmission clock and data signals | |||
666 | 5867695 | Method and system for reduced metastability between devices which communicate and operate at different clock frequencies | |||
667 | 5867542 | Clock phase detecting circuit and clock regenerating circuit each arranged in receiving unit of multiplex radio equipment | |||
668 | 5862191 | Digital communications receiver that includes a timing recovery device | |||
669 | 5859872 | High speed communications system for analog subscriber connections | |||
670 | 5857095 | Method for aligning a control signal and a clock signal | |||
671 | 5857005 | Method and apparatus for synchronizing transfer of data between memory cells | |||
1998 | |||||
672 | 5854717 | Self-synchronization in a magnetic recording channel utilizing time-domain equalization | |||
673 | 5852640 | Clock distribution apparatus with current sensed skew cancelling | |||
674 | 5852525 | Automatic clock signal phase adjustment in which a pattern including 0's is detected and integrated to effect the phase adjustment | |||
675 | 5838744 | High speed modem and method having jitter-free timing recovery | |||
676 | 5835541 | Sampling phase synchronizing apparatus and bidirectional maximum likelihood sequence estimation scheme therefore | |||
677 | 5835538 | High speed communications system for analog subscriber connections | |||
678 | 5832046 | Timing tracking in communications systems | |||
679 | 5832045 | Method and apparatus for recovering baud timing from correlation of intersymbol interference | |||
680 | 5832039 | Data processing circuit | |||
681 | 5825818 | Apparatus and method of recovering a timing signal in a transmission apparatus by adjusting tap coefficients | |||
682 | 5825211 | Oversampled state machine for jitter tolerant pulse detection | |||
683 | 5819076 | Memory controller with low skew control signal | |||
684 | 5818886 | Pulse synchronizing module | |||
685 | 5818371 | Coherent synchronization and processing of pulse groups | |||
686 | 5812608 | Method and circuit arrangement for processing received signal | |||
687 | 5812508 | Digital bit signal detection circuit for reproducing optical data | |||
688 | 5809086 | Intelligent timing recovery for a broadband adaptive equalizer | |||
689 | 5809075 | High speed communications system for analog subscriber connections | |||
690 | 5805646 | Synchronization method, and associated circuitry, for improved synchronization of a receiver with a transmitter using early-late testing during coarse synchronization | |||
691 | 5805619 | Method and apparatus for sampled-data partial-response signal timing error detector having zero self-noise | |||
692 | 5802358 | Digital audio data phase shifting apparatus | |||
693 | 5801695 | High speed communications system for analog subscriber connections | |||
694 | 5799190 | Communications coprocessor for realizing bidirectional isochronous communications link with host computer | |||
695 | 5793821 | Timing Recovery using group delay compensation | |||
696 | 5793804 | System and method for reducing the peak load on the processor of a block processing modem | |||
697 | 5784416 | Method and apparatus for detection of a communication signal | |||
698 | 5781587 | Clock extraction circuit | |||
699 | 5778032 | Data reproducing method and data reproducing unit | |||
700 | 5768323 | Symbol synchronizer using modified early/punctual/late gate technique | |||
701 | 5764710 | Meta-stable-resistant front-end to a synchronizer with asynchronous clear and asynchronous second-stage clock selector | |||
702 | 5764102 | Multi-stage symbol synchronization | |||
703 | 5760984 | Cost reduced interpolated timing recovery in a sampled amplitude read channel | |||
704 | 5754352 | Synchronous read channel employing an expected sample value generator for acquiring a preamble | |||
705 | 5748018 | Data transfer system for an integrated circuit, capable of shortening a data transfer cycle | |||
706 | 5745534 | Method and apparatus for data communication | |||
707 | 5737589 | Data transfer system and method including tuning of a sampling clock used for latching data | |||
708 | 5726818 | Magnetic disk sampled amplitude read channel employing interpolated timing recovery for synchronous detection of embedded servo data | |||
709 | 5724396 | Signal processing system | |||
710 | 5719867 | Plural telephony channel baseband signal demodulator for a broadband communications system | |||
711 | 5717619 | Cost reduced time varying fir filter | |||
1997 | |||||
712 | 5703905 | Multi-channel timing recovery system | |||
713 | 5699487 | Artificial neural network read channel | |||
714 | 5696800 | Dual tracking differential manchester decoder and clock recovery circuit | |||
715 | 5696793 | Phase difference detection circuit for extended partial-response class-4 signaling system | |||
716 | 5696639 | Sampled amplitude read channel employing interpolated timing recovery | |||
717 | 5692165 | Memory controller with low skew control signal | |||
718 | 5687198 | Channel estimation in a communication system | |||
719 | 5684839 | Apparatus for adjusting sample points based upon measured intersymbol interference | |||
720 | 5684833 | Mutual conversion method of binary data and multilevel signal, its communication method, and its receiving device | |||
721 | 5682125 | Adaptive analog transversal equalizer | |||
722 | 5675612 | Method and apparatus for timing recovery | |||
723 | 5671257 | Symbol timing recovery based on complex sample magnitude | |||
724 | 5659586 | Digital timing recovery circuit including a loop filter having a varying band width | |||
725 | 5654991 | Fast acquisition bit timing loop method and apparatus | |||
726 | 5651033 | Inter-system data communication channel comprised of parallel electrical conductors that simulates the performance of a bit serial optical communications link | |||
727 | 5651031 | Clock recovery circuit of demodulator | |||
728 | 5650954 | Frequency and time domain adaptive filtration in a sampled communication channel | |||
729 | 5648991 | Sampling phase synchronizing apparatus and bidirectional maximum likelihood sequence estimation scheme therefore | |||
730 | 5648987 | Rapid-update adaptive channel-equalization filtering for digital radio receivers, such as HDTV receivers | |||
731 | 5644604 | Digital phase selector system and method | |||
732 | 5642387 | Bit synchronization method and circuit | |||
733 | 5642243 | Timing recovery frequency error detector for sampled amplitude magnetic recording | |||
734 | 5640426 | Clock recovery circuit of demodulator | |||
735 | 5638409 | Data receiving device for reproducing a received symbol from a received data signal | |||
736 | 5636254 | Signal processing delay circuit | |||
737 | 5634041 | Rationally clocked communication interface | |||
738 | 5625650 | Synchronous adder device | |||
739 | 5625649 | Clock recovery circuit of demodulator | |||
740 | 5619542 | Device and method for efficient timing estimation in a digital receiver | |||
741 | 5619541 | Delay line separator for data bus | |||
742 | 5619507 | Method and apparatus for establishing and maintaining frame synchronization in a satellite communication system | |||
743 | 5615060 | Automatic clock signal phase adjusting circuit utilizing level detector and pattern detector | |||
744 | 5615059 | Automatic clock signal phase adjusting circuit | |||
745 | 5612975 | Digital receiver for variable data rate communications | |||
746 | 5612956 | Reformatting of variable rate data for fixed rate communication | |||
747 | 5604745 | TDMA mobile telephone apparatus | |||
748 | 5604741 | Ethernet system | |||
749 | 5602879 | Clock recovering circuit for digital demodulator | |||
750 | 5602878 | Method of delivering stable data across an asynchronous interface | |||
751 | 5598552 | Error free data transfers | |||
752 | 5598442 | Self-timed parallel inter-system data communication channel | |||
753 | 5598439 | Method and apparatus for symbol clock phase recovery | |||
754 | 5592340 | Communication channel with adaptive analog transversal equalizer | |||
1996 | |||||
755 | 5590140 | Clock recovery extrapolation | |||
756 | 5588025 | Single oscillator compressed digital information receiver | |||
757 | 5586149 | Interference dependent adaptive phase clock controller | |||
758 | 5581585 | Phase-locked loop timing recovery circuit | |||
759 | 5576904 | Timing gradient smoothing circuit in a synchronous read channel | |||
760 | 5574450 | Synchronization adder circuit | |||
761 | 5570396 | Transmission system comprising receiver with improved timing means | |||
762 | 5566213 | Selective call receiving device with improved symbol decoding and automatic frequency control | |||
763 | 5563888 | Carrier offset tracking for a receiver using channel impulse response | |||
764 | 5557647 | Baseband signal demodulator | |||
765 | 5550878 | Phase comparator | |||
766 | 5550862 | Method and apparatus for centering equalizer taps | |||
767 | 5548622 | Method and structure for synchronization of asynchronous signals | |||
768 | 5541958 | Clock recovery circuit of demodulator | |||
769 | 5539782 | Digital data receiver | |||
770 | 5537419 | Receiver sample timing adjustment using channel impulse response | |||
771 | 5535377 | Method and apparatus for low latency synchronization of signals having different clock speeds | |||
772 | 5535343 | Method and apparatus for generating write signals | |||
773 | 5535252 | Clock synchronization circuit and clock synchronizing method in baseband demodulator of digital modulation type | |||
774 | 5533050 | System for receiving a phase and amplitude modulated digital signal | |||
775 | 5530727 | Half synchronizer circuit interface system | |||
776 | 5528634 | Trajectory directed timing recovery | |||
777 | 5526200 | Clock reproducing apparatus and data reproducing apparatus utilizing weighting-adding of samples | |||
778 | 5524126 | Symbol timing recovery using fir data interpolators | |||
779 | 5524026 | Method and apparatus for judging timing phase of modem which is used in data communication | |||
780 | 5522048 | Low-power area-efficient and robust asynchronous-to-synchronous interface | |||
781 | 5519389 | Signal synchronized digital frequency discriminator | |||
782 | 5517526 | Timing recovery device in a receiver circuit for modems | |||
783 | 5517524 | Method of and apparatus for automatic equalizing filter | |||
784 | 5517521 | Method and apparatus for synchronization between real-time sampled audio applications operating full-duplex over a half-duplex radio link | |||
785 | 5515389 | Timing signal extracting circuit suitable for CMI signals | |||
786 | 5513209 | Resampling synchronizer of digitally sampled signals | |||
787 | 5511091 | Clock synchronization control check system | |||
788 | 5509038 | Multi-path data synchronizer system and method | |||
789 | 5504785 | Digital receiver for variable symbol rate communications | |||
790 | 5504751 | Method and apparatus for extracting digital information from an asynchronous data stream | |||
791 | 5502752 | Clock rate matching in independent networks | |||
792 | 5500877 | Receiver for a superpose modulated signal | |||
793 | 5500874 | Digital filtering, data rate conversion and modem design | |||
794 | 5500620 | Timing recovery for digital demodulation | |||
795 | 5499273 | Method and apparatus for symbol clock recovery from signal having wide frequency possibilities | |||
796 | 5495203 | Efficient QAM equalizer/demodulator with non-integer sampling | |||
797 | 5493570 | End of packet detector and resynchronizer for serial data buses | |||
798 | 5490174 | Digital data receiver | |||
799 | 5488639 | Parallel multistage synchronization method and apparatus | |||
800 | 5488638 | Clock recovery method and apparatus in a diversity receiver | |||
801 | 5487092 | System for high-speed synchronization across clock domains | |||
802 | 5485113 | Jitter-compensated sampling phase control apparatus | |||
803 | 5483648 | Circuit for determining the arrival times of control signals supplied to microprocessors | |||
804 | 5481568 | Data detecting apparatus using an over sampling and an interpolation means | |||
1995 | |||||
805 | 5471501 | Enhanced digital communications receiver using channel impulse estimates | |||
806 | 5467232 | Magnetic recording and reproducing method using phase discrimination and apparatus therefor | |||
807 | 5465059 | Method and apparatus for timing acquisition of partial response class IV signaling | |||
808 | 5459757 | Timing and gain control circuit for a PRML read channel | |||
809 | 5452323 | Simple asynchronous data synchronizer to a faster clock | |||
810 | 5450457 | Sampling phase extracting circuit | |||
811 | 5448201 | Clock recovery circuit in .pi./4 shift quadriphase PSK demodulator | |||
812 | 5446727 | Method and apparatus for time aligning signals for reception in a code-division multiple access communication system | |||
813 | 5440594 | Method and apparatus for joint optimization of transmitted pulse shape and receiver timing in digital systems | |||
814 | 5434804 | Method and apparatus for synchronizing a JTAG test control signal to an on-chip clock signal | |||
815 | 5432818 | Method and apparatus of joint adaptive channel encoding, adaptive system filtering, and maximum likelihood sequence estimation process by means of an unknown data training | |||
816 | 5426671 | Transmission system comprising receiver with improved timing means | |||
817 | 5425057 | Phase demodulation method and apparatus using asynchronous sampling pulses | |||
818 | 5422917 | Frequency offset estimation using the phase rotation of channel estimates | |||
819 | 5412698 | Adaptive data separator | |||
820 | 5412697 | Delay line separator for data bus | |||
821 | 5404379 | Timing recovery method and system | |||
822 | 5402453 | Apparatus and method for reliably clocking a signal with arbitrary phase | |||
823 | 5400340 | End of packet detector and resynchronizer for serial data buses | |||
824 | 5398237 | Acquisition and tracking of independent quadrature modulated bitstreams | |||
825 | 5394437 | High-speed modem synchronized to a remote CODEC | |||
826 | 5386436 | Synchronization system for use in digital transmission system | |||
827 | 5384552 | Clock recovery circuit for extracting clock information from a received baseband signal | |||
1994 | |||||
828 | 5375147 | Jitter compensating device | |||
829 | 5369673 | Framed digital signal regenerator suitable for microwave digital transmission installations | |||
830 | 5369672 | Interface circuit capable of performing exact data transfer | |||
831 | 5357613 | Time-domain boundary buffer method and apparatus | |||
832 | 5353312 | Equalizer-based timing recovery | |||
833 | 5353307 | Automatic simulcast alignment | |||
834 | 5345472 | Method and apparatus for receiving and decoding communication signals in a CDMA receiver | |||
835 | 5343502 | Symbol timing detecting circuit | |||
836 | 5343498 | Sample timing selection and frequency offset correction for U.S. digital cellular mobile receivers | |||
837 | 5331669 | Asynchronous pulse converter | |||
838 | 5325318 | Variable rate digital filter | |||
839 | 5319678 | Clocking system for asynchronous operations | |||
840 | 5319321 | Digital PLL circuit | |||
841 | 5317600 | Coarse tuning of the channel frequency | |||
842 | 5309484 | Method and apparatus for asynchronous timing recovery using interpolation filter | |||
843 | 5309482 | Receiver having an adjustable matched filter | |||
844 | 5305354 | Aborting synchronizer | |||
845 | 5297185 | Pattern detection and synchronization circuit | |||
846 | 5297162 | System and method for bit timing synchronization in an adaptive direct sequence CDMA communication system | |||
847 | 5291529 | Handshake synchronization system | |||
848 | 5291523 | Viterbi receiver with improved timing means | |||
849 | 5291522 | Device and method for estimating sampled value of impulse response and signal reproduction system using the device | |||
850 | 5285482 | Timing recovery device for receiver installation using adaptive equalization and oversampling associated with differentially coherent demodulation | |||
851 | 5283811 | Decision feedback equalization for digital cellular radio | |||
852 | 5282228 | Timing and automatic frequency control of digital receiver using the cyclic properties of a non-linear operation | |||
853 | 5280539 | Synchronous circuit for serial input signal | |||
854 | 5280501 | Data bit synchronization | |||
855 | 5278865 | Timing recovery scheme for a transceiver using a single sample clock source for transmitting and receiving signals | |||
856 | 5276711 | Receiver for a data signal which includes data symbols occurring at a given Baud rate | |||
1993 | |||||
857 | 5274628 | Multisignal synchronizer with shared last stage | |||
858 | 5272391 | Synchronizing circuit | |||
859 | 5267264 | Synchronization and matching method for a binary baseband transmission system | |||
860 | 5264937 | Apparatus for time division multiplexed processing of frequency division multiplexed signals | |||
861 | 5263026 | Maximum likelihood sequence estimation based equalization within a mobile digital cellular receiver | |||
862 | 5260976 | Preamble recognition and synchronization detection in partial-response systems | |||
863 | 5258933 | Timing control for PRML class IV sampling data detection channel | |||
864 | 5255292 | Method and apparatus for modifying a decision-directed clock recovery system | |||
865 | 5251238 | Circuit arrangement and method for the regeneration and synchronization of a digital signal | |||
866 | 5245635 | Clock recovery circuit for Manchester encoded data | |||
867 | 5243626 | Method for clocks synchronization for receiving pulse position encoded signals | |||
868 | 5235622 | Clock recovery circuit with open-loop phase estimator and wideband phase tracking loop | |||
869 | 5230012 | Process and circuit arrangement for digital control of the frequency and/or phase of scanning clock pulses | |||
870 | 5228057 | Method of determining sampling time points | |||
871 | 5227787 | Digital data converting system | |||
872 | 5199046 | First and second digital rate converter synchronization device and method | |||
873 | 5191596 | Apparatus and method for timing recovery in the reception of base band digital signals | |||
874 | 5182749 | Receiver for recovering data in a forward and reverse direction in time | |||
1992 | |||||
875 | 5173663 | Demodulation circuit enabling independent recovery of the carrier and sampling timing | |||
876 | 5163066 | Synchronizing the operation of multiple equilizers in a digital communications system | |||
877 | 5159609 | Data receiving device with delayed equalization and retroactive time-pulse recovery | |||
878 | 5157698 | Method for clock pulse synchronization | |||
879 | 5155745 | Synchronizer for asynchronous computer command data | |||
880 | 5140620 | Method and apparatus for recovering data, such as teletext data encoded into television signals | |||
881 | 5132990 | High speed data synchronizer | |||
882 | 5123033 | Extraction of an exact symbol rate as applied to bandwidth compression of modem signals through demodulation and remodulation | |||
883 | 5115208 | PLL clock signal regenerator using a phase correlator | |||
884 | 5103466 | CMOS digital clock and data recovery circuit | |||
885 | 5097488 | Transmission apparatus and method | |||
886 | 5093846 | Signal acquisition using modulation by a preselected code group | |||
1991 | |||||
887 | 5073906 | Synchronization word detection apparatus | |||
888 | 5073904 | Digital signal processing type demodulation method and demodulation circuit | |||
889 | 5065412 | Process and circuit arrangement for digital control of the phase of scanning clock pulses | |||
890 | 5058140 | Self-correcting serial baud/bit alignment | |||
891 | 5056121 | Circuit for obtaining accurate timing information from received signal | |||
892 | 5050167 | Timing extraction in multiplexed multichannel high speed fiber optic transmission system | |||
893 | 5048060 | Digital signal receiving circuit with means for controlling a baud rate sampling phase by a power of sampled signals | |||
894 | 5045801 | Metastable tolerant asynchronous interface | |||
895 | 5040192 | Method and apparatus for optimally autocorrelating an FSK signal | |||
896 | 5025458 | Apparatus for decoding frames from a data link | |||
897 | 5020078 | Baudrate timing recovery technique | |||
898 | 5018166 | Method and apparatus for baud timing recovery | |||
899 | 5014270 | Device for synchronizing a pseudo-binary signal with a regenerated clock signal having phase jumps | |||
900 | 5003559 | Digital transmission system | |||
901 | 4998264 | Method and apparatus for recovering data, such as teletext data encoded into television signals | |||
902 | 4995031 | Equalizer for ISDN-U interface | |||
903 | 4989221 | Sample rate converter | |||
904 | 4983975 | A/D converter | |||
1990 | |||||
905 | 4979190 | Method and apparatus for stabilized data transmission | |||
906 | 4977580 | Timing and carrier recovery in TDMA without preamble sequence | |||
907 | 4975927 | Demodulator with composite transversal equalizer and eye detection clock synchronizer | |||
908 | 4973860 | Circuit for synchronizing an asynchronous input signal to a high frequency clock | |||
909 | 4965814 | Synchronizer for establishing synchronization between data and clock signals | |||
910 | 4964118 | Apparatus and method for echo cancellation | |||
911 | 4959845 | Receiver of a system for transmitting data symbols at a given baud-rate | |||
912 | 4956853 | Method of servo-controlling the instant of regeneration in a digital transmission in which a carrier is modulated along two axes in quadrature, and apparatus for implementing the method | |||
913 | 4949361 | Digital data transfer synchronization circuit and method | |||
914 | 4949357 | Synchronizing circuit for offset quaternary phase shift keying | |||
915 | 4941155 | Method and circuitry for symbol timing and frequency offset estimation in time division multiple access radio systems | |||
916 | 4935942 | Data sampling architecture | |||
917 | 4931788 | Transponder and interrogator | |||
918 | 4928290 | Circuit for stable synchronization of asynchronous data | |||
919 | 4912726 | Decision timing control circuit | |||
920 | 4899366 | Tap rotation n fractionally spaced equalizer to compensate for drift due to fixed sample rate | |||
921 | 4896334 | Method and apparatus for timing recovery | |||
1989 | |||||
922 | 4890299 | Fast timing acquisition for partial-response signalling | |||
923 | 4881059 | Manchester code receiver | |||
924 | 4878229 | Fast frame and phase synchronization apparatus | |||
925 | 4866739 | Digital fast recovery timing algorithm | |||
926 | 4866738 | Circuit and method for deriving the word timing of a pulse position modulated signal | |||
927 | 4862484 | Apparatus for clock recovery from digital data | |||
928 | 4856030 | Apparatus and methods of locking a receiving modem to a transmitting modem employing a burst signal | |||
929 | 4856029 | Technique for processing a digital signal having zero overhead sync | |||
930 | 4853943 | Manchester code clock and data recovery system | |||
931 | 4852090 | TDMA communications system with adaptive equalization | |||
932 | 4849998 | Rate synchronized symbol timing recovery for variable rate data transmission systems | |||
933 | 4849991 | Method and circuitry for determining symbol timing for time division multiple access radio systems | |||
934 | 4837782 | CMI decoder | |||
935 | 4818995 | Parallel transmission system | |||
936 | 4815103 | Equalizer-based timing recovery | |||
937 | 4811364 | Method and apparatus for stabilized data transmission | |||
938 | 4811282 | Retiming circuit for pulse signals, particularly for microprocessor peripherals | |||
939 | 4808970 | Decoding device for CMI code | |||
940 | 4807260 | Non high frequency clock dependent Manchester biphasic decoder and comparator | |||
941 | 4805197 | Method and apparatus for recovering clock information from a received digital signal and for synchronizing that signal | |||
942 | 4805191 | Modem with improved timing recovery using equalized data | |||
943 | 4803705 | Analog phase locked loop | |||
944 | 4797900 | Modem with improved clock control and method therefor | |||
945 | 4796253 | Time base converter employing two reference position phase lock loop | |||
1988 | |||||
946 | 4794341 | Digital filters and demodulators | |||
947 | 4788696 | Decision timing control circuit | |||
948 | 4788605 | Receive Manchester clock circuit | |||
949 | 4775989 | Timing phase detector circuit | |||
950 | 4759036 | Decision-directed control circuit | |||
951 | 4757521 | Synchronization method and apparatus for a telephone switching system | |||
952 | 4752942 | Method and circuitry for extracting clock signal from received biphase modulated signal | |||
953 | 4746898 | Bi-phase decoder | |||
954 | 4745302 | Asynchronous signal synchronizing circuit | |||
955 | 4740965 | Asynchronous communications network | |||
956 | 4737952 | Time base converter employing two reference position phase lock loop | |||
957 | 4736386 | Carrier out-of-lock detector apparatus | |||
958 | 4727534 | Timing and carrier recovery in dual polarization communications systems | |||
959 | 4726043 | Data decision-directed timing and carrier recovery circuits | |||
1987 | |||||
960 | 4707841 | Digital data receiver for preamble free data transmission | |||
961 | 4704721 | Real time network system | |||
962 | 4694469 | Method and device for timing pull-in of receiving equipment | |||
963 | 4692931 | Synchronization circuit capable of establishing synchronism even when a sampling rate is invariable | |||
964 | 4689790 | Method and apparatus for remote signalling on a digital transmission link | |||
965 | 4688232 | Decoder for Manchester encoded data | |||
966 | 4677647 | Synchronization of multichannel receiver based on higher quality channels | |||
967 | 4672329 | Clock generator for digital demodulators | |||
968 | 4669092 | Arrangement for receiving digital data comprising an arrangement for adaptive timing recovery | |||
969 | 4658217 | Timing signal extracting circuit | |||
970 | 4648133 | Synchronization tracking in pulse position modulation receiver | |||
971 | 4646173 | Converting and decoding receiver for digital data recorded in analog form on magnetic tape | |||
972 | 4644546 | Method of digital signal transmission | |||
1986 | |||||
973 | 4631488 | QAM demodulator with distortion compensation | |||
974 | 4627080 | Adaptive timing circuit | |||
975 | 4607230 | Receiver unit having synchronous pull-in circuit | |||
976 | 4599723 | Method of encoding data for serial transmission | |||
977 | 4597089 | Single pulse fast learn modem | |||
978 | 4583238 | Synchronous data transmission system using a carrier modulated by an envelope of constant amplitude | |||
979 | 4580733 | Crushing apparatus for synthetic resin molded products | |||
980 | 4578800 | Synchronization circuit for a Viterbi decoder | |||
981 | 4575682 | Circuit for establishing accurate sample timing | |||
1985 | |||||
982 | 4562581 | Digital signal transmitting and receiving system for serial data which can be easily decoded | |||
983 | 4558409 | Digital apparatus for synchronizing a stream of data bits to an internal clock | |||
984 | 4542517 | Digital serial interface with encode logic for transmission | |||
985 | 4538119 | Clock extraction circuit using an oscillator and phase-locked programmable divider | |||
986 | 4520492 | Method for determining the optimum sampling times for a QPSK or QAM received signal | |||
987 | 4511993 | Arrangement for reading out defined data from a digital switching device with mutually asynchronous control signals for sequential switching of the device and transfer of the data | |||
988 | 4507794 | Filtered Manchester Coded PSK transmission system | |||
989 | 4493093 | Zero overhead sync in data recording | |||
1984 | |||||
990 | 4475220 | Symbol synchronizer for MPSK signals | |||
991 | 4472686 | Circuit for reproducing and demodulating modulated digital signals | |||
992 | 4455663 | Full duplex modems and synchronizing methods and apparatus therefor | |||
993 | 4455661 | Dual processor digital modem apparatus | |||
994 | 4453259 | Digital synchronization technique | |||
995 | 4445224 | Pull-in circuit for a digital phase locked loop | |||
996 | 4435825 | Clock signal extracting circuit | |||
997 | 4435687 | Clock signal recovery circuit | |||
998 | 4426714 | Clock signal derivation system | |||
1983 | |||||
999 | 4423518 | Timing recovery circuit | |||
1000 | 4416015 | Timing acquisition in voiceband data sets | |||
1001 | 4411000 | Timing recovery technique | |||
1002 | 4408333 | Data acquisition circuit | |||
1003 | 4390985 | Device for the synchronization of digital data transmitted in packets | |||
1004 | 4376309 | Method and apparatus for signal-eye tracking in digital transmission systems | |||
1005 | 4373152 | Binary to one out of four converter | |||
1982 | |||||
1006 | 4360926 | Digital phase-locked loop | |||
1007 | 4359770 | Bit buffer system | |||
1008 | 4355398 | Real time clock recovery circuit | |||
1009 | 4351061 | Method of phase synchronization in a synchronous data transmission system, and apparatus for carrying out the method | |||
1010 | 4348769 | Circuitry for extraction of a transmission clock signal from-modulated data transmissions | |||
1011 | 4344179 | Clock synchronizer and data detector | |||
1012 | 4344176 | Time recovery circuitry in a modem receiver | |||
1013 | 4334313 | Timing recovery technique | |||
1014 | 4320527 | Bit synchronizing system for pulse signal transmission | |||
1015 | 4320525 | Self synchronizing clock derivation circuit for double frequency encoded digital data | |||
1016 | 4313206 | Clock derivation circuit for double frequency encoded serial digital data | |||
1981 | |||||
1017 | 4290139 | Synchronization of a data communication receiver with a received signal | |||
1018 | 4285061 | Equalizer sample loading in voiceband data sets | |||
1019 | 4276650 | Method of synchronizing a quadphase receiver and clock synchronization device for carrying out the method | |||
1020 | 4272845 | Receiver for data-transmission system operating with single-sideband amplitude modulation | |||
1021 | 4263671 | Sampling clock correction circuit | |||
1022 | 4261054 | Real-time adaptive power control in satellite communications systems | |||
1023 | 4254318 | Door seal arrangement for high-frequency heating apparatus | |||
1024 | 4245345 | Timing acquisition in voiceband data sets | |||
1980 | |||||
1025 | 4239934 | Means and an apparatus for synchronizing an orthogonal diphase code receiver | |||
1026 | 4234957 | Method and apparatus for generating timing phase error signals in PSK demodulators | |||
1027 | 4218771 | Automatic clock positioning circuit for a digital data transmission system | |||
1028 | 4218770 | Delay modulation data transmission system | |||
1029 | 4215239 | Apparatus for the acquisition of a carrier frequency and symbol timing lock | |||
1030 | 4213006 | Circuit arrangement for the coarse synchronization of carrier signals and pulse signals with data signals in a data receiver | |||
1031 | 4207528 | Timing-phase control system for duobinary transmission | |||
1032 | 4185273 | Data rate adaptive control device for Manchester code decoders | |||
1979 | |||||
1033 | 4163946 | Noise-immune master timing generator | |||
1034 | 4146840 | Technique for obtaining symbol timing for equalizer weights | |||
1035 | 4137427 | Synchronizing device for the receiver clock of a data transmission system using PSK modulation | |||
1978 | |||||
1036 | 4131854 | Switching circuit for regulating the repetition rate of clock pulses | |||
1037 | 4119796 | Automatic data synchronizer | |||
1038 | 4100495 | Adaptive method of and means for recovering digital signals | |||
1039 | 4099023 | Method for the regulation of the phase of a timing signal in a data transmission system | |||
1040 | 4080572 | Receiver and method for synchronizing and detecting coded waveforms | |||
1041 | 4071827 | Transversal type automatic phase and amplitude equalizer | |||
1977 | |||||
1042 | 4061978 | Timing recovery for an automatically equalized data modem | |||
1043 | 4039960 | Automatic phasing circuit to transfer digital data from an external interface circuit to an internal interface circuit | |||
1044 | 4012697 | Clock signal extraction during playback of a self-clocking digital recording | |||
1045 | 4012591 | Circuit arrangement for the phase control of a clock signal | |||
1046 | 4010421 | Synchronization method for the recovery of binary signals | |||
1047 | 4004226 | QAM receiver having automatic adaptive equalizer | |||
1976 | |||||
1048 | 3997772 | Digital phase shifter | |||
1049 | 3990010 | Data transmission systems | |||
1050 | 3971996 | Phase tracking network | |||
1051 | 3969582 | System for automatic synchronization of blocks transmitting a series of bits | |||
1052 | 3967061 | Method and apparatus for recovering data and clock information in a self-clocking data stream | |||
1053 | 3961311 | Circuit arrangement for correcting slip errors in receiver of cyclic binary codes | |||
1054 | 3942124 | Pulse synchronizing apparatus and method | |||
© 2017, ПАТ-Инфо, В.И. Карнышев
Дата формирования списка: 03.04.2017 |