H04L7/033

СПИСОК патентов США - подгруппа МПК¹⁶ H04L7/033

Выделить слова в названиях патентов:


№ п/п	Номер патента	Название патента
2017
1	9608801	Programmable frequency divider providing a fifty-percent duty-cycle output over a range of divide factors
2	9608799	Frequency acquisition for serdes receivers
3	9608798	Method for performing phase shift control for timing recovery in an electronic device, and associated apparatus
4	9608754	Systems and methods for synchronization of clock signals
5	9608649	Analog phase-locked loop with enhanced acquisition
6	9608523	Regulator, serializer, deserializer, serializer/deserializer circuit, and method of controlling the same
7	9602272	Clock and data recovery circuit and system using the same
8	9602085	Data storage element and signal processing method
9	9596666	System for processing asynchronous sensor data
10	9596074	Clock recovery for data signals
11	9591665	Method and apparatus for effectively providing TDD configuration information to user equipment and determining uplink transmission timing in mobile communication system supporting TDD
12	9590797	Edge rate control calibration
13	9589052	Remote node for bi-directional digital audio data and control communications
14	9584309	Circuit for dynamically adaptive bit-leveling by incremental sampling, jitter detection, and exception handling
15	9584308	Digital system for estimating signal non-energy parameters using a digital phase locked loop
16	9584305	Deskew FIFO buffer with simplified initialization
17	9584304	Phase interpolator and clock and data recovery circuit
18	9584143	Modulator, phase locked loop using the same, and method applied thereto
19	9582457	Camera control interface extension bus
20	9577816	Clock and data recovery having shared clock generator
21	9571266	Methods and systems for estimating skew
22	9571265	Sample rate converter with sample and hold
23	9571263	Integrated circuit incorporating a low power data retiming circuit
24	9571160	High data rate serial link
25	9565015	Signal reproduction circuit, electronic apparatus, and signal reproducing method
26	9565014	Initializing a descrambler
27	9564913	Synchronization of outputs from multiple digital-to-analog converters
28	9563228	Clock generation for timing communications with ranks of memory devices
29	9559878	Phase adjustment circuit for clock and data recovery circuit
30	9559877	System and method for adjusting clock phases in a time-interleaved receiver
31	9559836	Clock data recovery circuit
32	9559835	Signal receiver with multi-level sampling
33	9559834	Multi-rate transceiver circuitry
34	9553745	High-speed signaling systems with adaptable pre-emphasis and equalization
35	9553718	PLL circuit and control method thereof
36	9553717	Systems and methods for clock and data recovery
37	9553716	Network receiver for a network using distributed clock synchronization and a method of adjusting a frequency of an internal clock of the network receiver
38	9553715	Optical phase detector for an optical phase lock loop
39	9553714	Frequency multiplier for a phase-locked loop
40	9552325	Camera control interface extension bus
41	9549383	Clock synchronization system and method for base station
42	9548858	Skew management for PAM communication systems
43	9548856	High-speed clock skew correction for SERDES receivers
44	9548805	Method and system for optimizing communication in leaky wave distributed transceiver environments
45	9548746	Coarse tuning selection for phase locked loops
46	9544638	Method for reconstructing system time clock (STC) without carrying PCR
47	9544169	Multiphase receiver with equalization circuitry
48	9544089	Techniques to perform forward error correction for an electrical backplane
49	9544071	Margin test methods and circuits
50	9537956	System for acquiring time-synchronized sensor data
51	9537682	High speed receiver with one-hot decision feedback equalizer
2016
52	9531572	Interface circuit for high speed communication and system including the same
53	9531529	System and method for saddle point locking detection during clock and data recovery
54	9531391	Frequency-agile clock multiplier
55	9529771	Communication system
56	9525576	Self-adapting phase-locked loop filter for use in a read channel
57	9525545	Phase locked loop for preventing harmonic lock, method of operating the same, and devices including the same
58	9525544	Referenceless clock recovery circuit with wide frequency acquisition range
59	9521636	Synchronization circuitry, common public radio interface enable device, and a method of synchronizing a synchronized clock signal of a second transceiver to a clock of a first transceiver
60	9520989	Phase detector and retimer for clock and data recovery circuits
61	9520987	Systems and methods for timing recovery in near-field communication
62	9520965	Monitoring and control of reference clocks to reduce bit error ratio
63	9515852	Loss of signal detection on CDR
64	9515815	Transpositional modulation systems, methods and devices
65	9515814	Phase control block for managing multiple clock domains in systems with frequency offsets
66	9515813	Initializing a descrambler
67	9509491	Data reception apparatus and method of determining identical-value bit length in received bit string
68	9509490	Reference clock sharing
69	9509489	Correction of quadrature modulation errors
70	9509487	Synchronous transfer of streaming data in a distributed antenna system
71	9509323	Fractional-N synthesizer with pre-multiplication
72	9503254	Phase locked loop with modified loop filter
73	9503251	Method and apparatus for mitigation of baseline wander on an AC coupled link
74	9503104	Low power loss of lock detector
75	9497020	Initializing a descrambler
76	9496879	Multiphase clock data recovery for a 3-phase interface
77	9491028	Phase synchronization of modulation or demodulation for QAM-based multiband TSV-link
78	9490969	Transmission apparatus, reception apparatus, and transmission and reception system
79	9490968	CDR voter with improved frequency offset tolerance
80	9490965	Simultaneous transmission of clock and bidirectional data over a communication channel
81	9490964	Symbol transition clocking clock and data recovery to suppress excess clock caused by symbol glitch during stable symbol period
82	9485085	Phase locked loop (PLL) architecture
83	9485084	Linearity of phase interpolators by combining current coding and size coding
84	9485082	Multi-mode phase-frequency detector for clock and data recovery
85	9484933	Device for generating frequency-stable signals with switchable injection-locked oscillator
86	9484929	Circuit arrangement and method for calibrating activation signals for voltage-controlled oscillators
87	9479364	Unequalized clock data recovery for serial I/O receiver
88	9473294	Radio transceiver having frequency synthesizer
89	9473293	Systems and methods for operating radio transceivers
90	9473292	Device and method for NRZ CDR calibration
91	9467278	Methods and apparatus for trimming of CDR clock buffer using phase shift of transmit data
92	9467246	Clock recovery method and clock recovery arrangement for coherent polarization multiplex receivers
93	9467153	Low power and compact area digital integrator for a digital phase detector
94	9466353	Methods and apparatus for synchronizing communication with a memory controller
95	9466249	Display and operating method thereof
96	9461814	High-speed clock skew correction for serdes receivers
97	9461813	Optical data interface with electrical forwarded clock
98	9461811	Clock and data recovery circuit and clock and data recovery method
99	9461773	Method and a node for detecting phase noise in MIMO communication systems
100	9455854	Phase-locked loop frequency calibration method and system
101	9455847	Wireless communication apparatus with phase noise mitigation
102	9455825	Receiver with clock recovery circuit and adaptive sample and equalizer timing
103	9455824	Distributed network synchronization methods and architectures
104	9455823	Four-phase clock generator with timing sequence self-detection
105	9455822	Receiver, transmitter, and communication method
106	9455046	Adaptive analog-to-digital conversion based on signal prediction
107	9450745	Method and apparatus for radio frequency (RF) pulse synchronization in super regenerative receiver (SRR)
108	9444616	Transponder unit, system and method for contactless data transmission
109	9444615	Low latency digital jitter termination for repeater circuits
110	9444614	Dynamic power control for CDR
111	9444554	Digital coherent receiving apparatus
112	9444500	Modulation circuit of digital transmitter, digital transmitter, and signal modulation method
113	9438410	Semiconductor apparatus and system
114	9436211	Clock conversion apparatus with an elastic store memory from which data is written in synchronization with a first clock and read out in synchronization with a second clock
115	9436209	Method and system for clock recovery with adaptive loop gain control
116	9432179	Signaling system with adaptive timing calibration
117	9432176	Circuit and method for clock and data recovery
118	9426096	Single-lane, twenty-five gigabit ethernet
119	9426082	Low-voltage differential signaling or 2-wire differential link with symbol transition clocking
120	9425834	Trajectory modification technique for polar transmitter
121	9425807	Circuit for symbol timing synchronization
122	9424741	Combined sense signal generation and detection
123	9419834	MPSK demodulation apparatus and method
124	9419825	Selectable-tap equalizer
125	9419788	Data transfer clock recovery for legacy systems
126	9419787	CDR circuit and semiconductor device
127	9419786	Multi-lane serial link signal receiving system
128	9418037	SPI interface and method for serial communication via an SPI interface having an SPI protocol handler for evaluating signal transitions of SPI signals
129	9413691	MAC address synchronization in a fabric switch
130	9413525	Semiconductor device
131	9413523	Frequency acquisition for SERDES receivers
132	9413517	CDR circuit and semiconductor device
133	9407574	Using SerDes loopbacks for low latency functional modes with full monitoring capability
134	9407480	Electric and electronic apparatus, circuit, and communication system
135	9407479	Pulse width modulation data recovery device and driving method thereof
136	9407430	Carrier frequency synchronization of data
137	9407429	Method of establishing an oscillator clock signal
138	9407427	Technique for optimizing the phase of a data signal transmitted across a communication link
139	9407354	Outdoor digital modulator system for use with a linear radio, and a method thereof
140	9405678	Flash memory controller with calibrated data communication
141	9401827	Semiconductor device and information processing system
142	9401720	Circuit arrangement and method for clock and/or data recovery
143	9397868	Split-path equalizer and related methods, devices and systems
144	9392602	Method and device for adjusting carrier frequency of multiple-input multiple output microwave device
145	9386521	Clock structure for reducing power consumption on wireless mobile devices
146	9385861	Wireless device and method for controlling wireless device
147	9385860	Fractional PLL circuit
148	9385859	Multi-lane serial data link receiver and method thereof
149	9379925	Transpositional modulation systems and methods
150	9379921	Method for performing data sampling control in an electronic device, and associated apparatus
151	9379884	Symbol clock recovery circuit
152	9374217	SerDes with high-bandwith low-latency clock and data recovery
153	9374216	Multi-wire open-drain link with data symbol transition based clocking
154	9369270	Dual-coupled phase-locked loops for clock and packet-based synchronization
155	9369269	Communication systems and methods for distributed power system measurement
156	9369268	Reception circuit
157	9369267	Communication reception with compensation for relative variation between transmit bit interval and receiver sampling interval
158	9369265	Data receiver
159	9369183	Systems and methods for measuring power and impedance in wireless power charging systems
160	9367248	Memory component with pattern register circuitry to provide data patterns for calibration
161	9363071	Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches
162	9363025	Signal propagation system and method of reducing electromagnetic radiation emissions caused by communication of timing information
163	9356775	Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver system
164	9356773	Time-to-digital converter, all digital phase locked loop circuit, and method
165	9356772	Hybrid clock and data recovery circuit and system including the same
166	9356771	Method of generating clock and semiconductor device
167	9356770	Oversampling CDR which compensates frequency difference without elasticity buffer
168	9355054	Digital calibration-based skew cancellation for long-reach MIPI D-PHY serial links
169	9350587	System and method for timing error estimation
170	9350530	Phase-locked loop architecture and clock distribution system
171	9350529	Method and apparatus for detecting logical signal
172	9350528	Low power digital phase interpolator
173	9350526	Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using in-phase samples
174	9348358	Clock multiplication and distribution
175	9344272	Parallel replica CDR to correct offset and gain in a baud rate sampling phase detector
176	9344271	Digital correction of spurious tones caused by a phase detector of a hybrid analog-digital delta-sigma modulator based fractional-N phase locked loop
177	9344270	Phase detection and correction for non-continuous local oscillator generator
178	9344269	Receiving circuit
179	9344268	Phase alignment architecture for ultra high-speed data path
180	9344267	Data receiver and data receiving method thereof
181	9344097	Fast acquisition frequency detector
182	9337997	Transcoding method for multi-wire signaling that embeds clock information in transition of signal state
183	9337993	Timing recovery in a high speed link
184	9337992	Clock and data recovery using receiver clock spread spectrum modulation and offset compensation
185	9337848	Clock and data recovery device
186	9337817	Hold-time optimization circuit and receiver with the same
187	9331845	System and method for chip system timing compensation
188	9325491	Clock generation circuit with dual phase-locked loops
189	9325490	Referenceless clock and data recovery circuit
190	9325489	Data receivers and methods of implementing data receivers in an integrated circuit
191	9319217	Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using quadrature-phase samples
192	9313058	Compact and fast N-factorial single data rate clock and data recovery circuits
193	9313019	Multi-channel timing recovery device
194	9313018	Circuit and method for clock recovery of quadrature amplitude modulated waveforms
195	9313017	Baud-rate CDR circuit and method for low power applications
196	9313016	Receiver circuit, communication system, electronic device, and method for controlling receiver circuit
197	9312910	Multi-channel transceiver
198	9312865	Bimodal serial link CDR architecture
199	9311231	Connecting interface unit and memory storage device
200	9306732	At-rate SERDES clock data recovery with controllable offset
201	9306730	Fractional-N PLL-based CDR with a low-frequency reference
202	9306729	Phase interpolator calibration
203	9306621	Transceiver including a high latency communication channel and a low latency communication channel
204	9304535	Baud rate phase detector with no error latches
205	9300506	Clock synchronization circuit and semiconductor device
206	9300500	Adaptive equalizer and method of controlling the same
207	9300463	Multi-rate transceiver circuitry
208	9300461	Reception circuit
209	9300303	Method and apparatus for controlling supply voltage of clock and data recovery circuit
210	9294264	High-frequency signal processing device and wireless communication system
211	9294263	Methods and systems of synchronizer selection
212	9294260	Phase adjustment circuit for clock and data recovery circuit
213	9294108	RF circuit with DCO, state machine, latch, modulator, timing update
214	9288003	Reception circuit and semiconductor integrated circuit device
215	9287883	Multi-lane re-timer circuit and multi-lane reception system
216	9281989	Compensation apparatus, signal generator and wireless communication equipment
217	9281969	Configurable multi-dimensional driver and receiver
218	9281938	Wireless communication device, wireless communication system, and receiving circuit
219	9281934	Clock and data recovery with high jitter tolerance and fast phase locking
220	9281828	Reference-less voltage controlled oscillator (VCO) calibration
221	9276733	Signal reproduction circuit, signal reproduction system, and signal reproduction method
222	9276592	Multimedia interface receiving circuit
223	9270287	Apparatus and method for recovering burst-mode pulse width modulation (PWM) and non-return-to-zero (NRZ) data
224	9264264	Systems and methods for filtering a received signal to remove intersymbol interference
225	9264217	Clock drift compensation applying paired clock compensation values to buffer
226	9264214	Phase detection method and apparatus for clock recovery
227	9264155	Apparatus and system for tracking data speed automatically
228	9258110	Phase detector
229	9258011	Efficient two-stage asynchronous sample-rate converter
230	9252902	Precision timing in a data over cable service interface specification (DOCSIS) system
231	9252785	Clock recovery for a data receiving unit
232	9246670	Compact low-power fully digital CMOS clock generation apparatus for high-speed SerDes
233	9246669	Apparatus and method for modular signal acquisition and detection
234	9246666	Skew tolerant clock recovery architecture
235	9237005	Clock data recovery circuit module and method for generating data recovery clock
236	9237004	Clock data recovery circuit
237	9237003	Digital bit insertion for clock recovery
238	9237002	Null-gating signal detection
239	9237000	Transceiver clock architecture with transmit PLL and receive slave delay lines
240	9231802	Influence clock data recovery settling point by applying decision feedback equalization to a crossing sample
241	9231716	Methods and apparatus for generating two-tone calibration signals for performing linearity calibration
242	9231571	Resonant clock amplifier with a digitally tunable delay
243	9229433	System and method for synchronizing local oscillators
2015
244	9225508	Low-noise flexible frequency clock generation from two fixed-frequency references
245	9225507	System and method for synchronizing local oscillators
246	9219601	Synchronisation method and device for transmit and receive symbols of all-digital receiver
247	9219600	Synchronization through waveform correlation
248	9219599	Clock and data recovery circuit
249	9215676	Base station clock apparatus, base station system and method for clock synchronization
250	9215062	Low-noise flexible frequency clock generation from two fixed-frequency references
251	9209966	Clock recovery circuit
252	9209965	Network interface with clock recovery module on line card
253	9209964	Systems and methods for DTE/DCE CESoP timing
254	9209962	High-speed clock skew correction for serdes receivers
255	9209906	Clock recovery circuit, optical receiver, and passive optical network device
256	9209821	Apparatus for generating quadrature clock phases from a single-ended odd-stage ring oscillator
257	9209818	On die jitter tolerance test
258	9209783	Efficient drift avoidance mechanism for synchronous and asynchronous digital sample rate converters
259	9203605	CMOS interpolator for a serializer/deserializer communication application
260	9203604	Methods and apparatus for performing bit swapping in clock data recovery circuitry
261	9203599	Multi-lane N-factorial (N!) and other multi-wire communication systems
262	9203598	Asymmetric link for streaming applications
263	9201444	Clock generation for timing communications with ranks of memory devices
264	9197403	Calibration arrangement for frequency synthesizers
265	9197402	Re-circulating time-to-digital converter (TDC)
266	9197399	Digital signal sampling method
267	9197395	Point to multi-point clock-forwarded signaling for large displays
268	9191194	Data transfer clock recovery for legacy systems
269	9191193	Clock synchronization
270	9191192	Digital NRZI signal for serial interconnect communications between the link layer and physical layer
271	9191187	Reception circuit and semiconductor integrated circuit
272	9191186	Device and method compensating for edge distortions of serial data signal
273	9191185	Differential bang-bang phase detector using standard digital cells
274	9191184	Transmitter, receiver and system including the same
275	9191183	Using decision feedback phase error correction
276	9191128	Spread spectrum clock generator and method for generating spread spectrum clock signal
277	9191020	Traveling-wave based high-speed sampling systems
278	9184853	Reception device
279	9178690	N factorial dual data rate clock and data recovery
280	9178689	Multimode base station and implementation method thereof
281	9178688	Receiver with clock recovery circuit and adaptive sample and equalizer timing
282	9178683	Method and apparatus for parallel demodulation of high symbol rate data streams in a communications system
283	9178637	Method and devices for synchronization using linear programming
284	9178554	Phase correction apparatus and method
285	9178521	Fast settling mixed signal phase interpolator with integrated duty cycle correction
286	9172526	IQ-skew adaptation for a symmetric eye in a SerDes receiver
287	9166775	Cross-channel data communication with data phase-locked loop
288	9166774	Decoupling bang-bang CDR and DFE
289	9166772	Data reception apparatus oversampling received bits and data communication system oversampling received bits
290	9160521	Timing signal generation circuit
291	9160518	Half-rate clock-data recovery circuit and method thereof
292	9160390	Method and system for impairment shifting
293	9159388	Methods and apparatus for synchronizing communication with a memory controller
294	9154293	Method and apparatus for compensating for variable symbol timing using cyclic prefix in non-synchronized OFDM system
295	9148322	High-speed signaling systems with adaptable pre-emphasis and equalization
296	9148279	Phase locking for multiple serial interfaces
297	9148278	Digital frequency synthesis
298	9148277	Clock reproducing and timing method in a system having a plurality of devices
299	9148276	Half-rate clock and data recovery circuit
300	9148154	Delay-locked loop with independent phase adjustment of delayed clock output pairs
301	9143316	Non-disruptive eye scan for data recovery units based on oversampling
302	9143315	Predictive periodic synchronization using phase-locked loop digital ratio updates
303	9143314	Low power oversampling with delay locked loop implementation
304	9143313	Frequency sweep signal generator, frequency component analysis apparatus, radio apparatus, and frequency sweep signal generating method
305	9143312	Using a single phase error algorithm for coarse and fine signal timing synchronisation
306	9137063	High-speed signaling systems with adaptable pre-emphasis and equalization
307	9137008	Three phase clock recovery delay calibration
308	9137006	Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using quadrature and in-phase samples
309	9130737	Signal-generating circuit and wireless communication device
310	9130736	Transceiver system having phase and frequency detector and method thereof
311	9130735	Multi-phase clock generation method
312	9128643	Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern
313	9124416	Method for determining phase of clock used for reception of parallel data, receiving circuit, and electronic apparatus
314	9124415	PLL glitchless phase adjustment system
315	9124414	Receiver
316	9124413	Clock and data recovery for NFC transceivers
317	9124390	Drift tracking feedback for communication channels
318	9124278	Half rate serialization and memory cell for high speed serializer-deserializer
319	9118458	Clock phase alignment
320	9116810	Margin test methods and circuits
321	9112646	Interpolator-based clock and data recovery with reduced quantization error
322	9106458	Method for detecting phase and phase detecting system
323	9106402	Signal delay estimator with absolute delay amount and direction estimation
324	9106401	Deterministic synchronization for transmitting signals between different clock domains
325	9106400	Hybrid timing recovery for burst mode receiver in passive optical networks
326	9106399	Phase control block for managing multiple clock domains in systems with frequency offsets
327	9106397	Selectable-tap equalizer
328	9100167	Multilane SERDES clock and data skew alignment for multi-standard support
329	9099995	Ring oscillator circuit and method
330	9098199	Data receiver, clock generation device, and method for controlling data receiver
331	9094908	Device and method for synchronization in a mobile communication system
332	9094238	High-speed signaling systems with adaptable pre-emphasis and equalization
333	9094185	Phase locked loop with the ability to accurately apply phase offset corrections while maintaining the loop filter characteristics
334	9094184	First and second phase detectors and phase offset adder PLL
335	9094183	Circuits for receiving data
336	9094113	Apparatus and method for reducing phase noise in near field communication device signaling
337	9088405	Clock phase interpolator, data transmission and reception circuit, and method of clock phase interpolation
338	9088399	Circuit and method for testing jitter tolerance
339	9088369	Self injection locked phase locked looped optoelectronic oscillator
340	9083505	Manchester code receiving circuit
341	9083498	Method and device for processing data and communication system comprising such device
342	9083476	Signal multiplexing device
343	9083357	Frequency locking system
344	9083355	Method and apparatus for end node assisted neighbor discovery
345	9077573	Very compact/linear software defined transmitter with digital modulator
346	9077517	Synchronous transfer of streaming data in a distributed antenna system
347	9077512	Lock detector for phase-locked loop
348	9077352	Clock regeneration circuit, light receiving circuit, photocoupler, and frequency synthesizer
349	9077330	Serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits
350	9077328	Method and apparatus for reference-less repeater with digital control
351	9075628	Electronic system and communication control method for transmitting and receiving data by serial communication
352	9071415	Semiconductor device
353	9071410	Simultaneous transmission of clock and bidirectional data over a communication channel
354	9071252	Radio communication apparatus
355	9065628	Frequency-agile clock multiplier
356	9065607	Clock data recovery circuit, data reception apparatus, and data transmission and reception system
357	9065601	Circuits for and methods of implementing a receiver in an integrated circuit device
358	9059837	Clock data recovery circuit and clock data recovery method
359	9059833	Data receiving device and method thereof
360	9059825	Receiver, system including the same, and calibration method thereof
361	9054851	Dithering circuit for serial data transmission
362	9054838	Synchronization recovery system
363	9054821	Apparatus and method for frequency locking
364	9020089	Phase-locked loop (PLL)-based frequency synthesizer
365	9008255	Jitter mitigating phase locked loop circuit
366	8989333	Clock data recovery method and clock data recovery circuit
367	8964920	Auto-determining sampling frequency method and device thereof
368	8934595	Estimation of sample clock frequency offset based on error vector magnitude
2014
369	8886988	Method of calibrating signal skews in MIPI and related transmission system
370	8831159	AM-PM synchronization unit
371	8811557	Frequency acquisition utilizing a training pattern with fixed edge density
372	8724764	Distortion tolerant clock and data recovery
373	8666013	Techniques for clock data recovery
374	8634473	Video image processing apparatus capable of processing hierarchically-encoded video data subjected to hierarchical coding and control method therefor
2013
375	8559582	Techniques for varying a periodic signal based on changes in a data rate
376	8532200	System and method for side band communication in SERDES transmission/receive channels
377	8433991	Global Navigation Satellite System (GLONASS) data bit edge detection
378	8355478	Circuit for aligning clock to parallel data
2012
379	8238501	Burst-mode clock and data recovery circuit using phase selecting technology
380	8218703	Methods of processing a wireless communication signal, wireless communication synchronization methods, and a radio frequency identification device communication method
2011
381	7919994	Reception comparator for signal modulation upon a supply line
2010
382	7760835	Wireless communications devices, methods of processing a wireless communication signal, wireless communication synchronization methods and a radio frequency identification device communication method
2009
383	7502434	Frequency detector including a variable delay filter
2006
384	6999547	Delay-lock-loop with improved accuracy and range
2005
385	6968025	High-speed transmission system having a low latency
386	6965659	Device and method for detecting a period of an input signal
387	6965262	Method and apparatus for receiving high speed signals with low latency
388	6964007	Asymmetric error correction apparatus and method, and clock recovering apparatus for optical reading system employing the same
389	6963628	Multiphase retiming mechanism
390	6960960	Frequency detector detecting variation in frequency difference between data signal and clock signal
391	6959083	Loop current monitor circuitry and method for a communication system
392	6959064	Clock recovery PLL
393	6959058	Data recovery apparatus and method for minimizing errors due to clock skew
394	6959051	Clock regenerator for use in demodulating digital modulated signals
395	6959038	High-speed decoder for a multi-pair gigabit transceiver
396	6956923	High speed phase detector architecture
397	6956921	Clock and data recovery circuit
398	6954506	Clock signal recovery circuit used in receiver of universal serial bus and method of recovering clock signal
399	6949958	Phase comparator capable of tolerating a non-50% duty-cycle clocks
400	6947510	Circuit for generating an output phase signal with a variable phase shift relative to a reference phase
401	6947498	Method and apparatus for performing joint timing recovery of multiple received signals
402	6947482	System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system
403	6944237	Multi-pair transceiver decoder system with low computation slicer
404	6943632	Frequency locked loop, clock recovery circuit and receiver
405	6941485	Clock supply circuit for supplying a processing clock signal used for processing an input signal having a predetermined frequency
406	6940934	Synchronizing signal processing circuit
407	6937685	Apparatus and method for counting high-speed early/late pulses from a high speed phase detector using a pulse accumulator
408	6937682	Clock-pulse supply unit
409	6937679	Spread spectrum clocking tolerant receivers
410	6934866	Network interface using programmable delay and frequency doubler
411	6934347	Method for recovering a clock signal in a telecommunications system and circuit thereof
412	6930628	Amplitude detection for controlling the decision instant for sampling as a data flow
413	6930512	One-level zero-current-state exclusive or (XOR) gate
414	6928570	System clock synchronization circuit
415	6928158	Transmission of a clock by a capacitive isolating barrier
416	6928106	Phy control module for a multi-pair gigabit transceiver
417	6928018	Dynamic register with low clock rate testing capability
418	6927565	Dynamic register with IDDQ testing capability
419	6924705	Inject synchronous narrowband reproducible phase locked looped
420	6922469	Separation of ring detection functions across isolation barrier for minimum power
421	6917661	Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detector
422	6917658	Clock recovery method for bursty communications
423	6914953	Multiphase clock recovery using D-type phase detector
424	6912260	System clock synchronization using phase-locked loop
425	6912246	Clock signal transmitting system, digital signal transmitting system, clock signal transmitting method, and digital signal transmitting method
426	6909852	Linear full-rate phase detector and clock and data recovery circuit
427	6909329	Adaptive loop bandwidth circuit for a PLL
428	6909317	Clock control circuit and method
429	6907553	Method and apparatus for estimation of error in data recovery schemes
430	6903587	Clock data recovery circuit with improved jitter transfer characteristics and jitter tolerance
431	6901126	Time division multiplex data recovery system using close loop phase and delay locked loop
432	6901124	Diversity receiving apparatus that prevents judgement errors during decoding and a clock generating circuit for a diversity circuit that prevents judgement errors during decoding
433	6900676	Clock generator for generating accurate and low-jitter clock
434	6898724	System for latching an output signal generated by comparing complimentary strobe signals and a data signal in response to a comparison of the complimentary strobe signals
435	6888906	Clock and data regenerator with demultiplexer function
436	6888905	Low deviation index demodulation scheme
437	6888417	Voltage controlled oscillator
438	6888379	Phase comparator circuit
439	6879650	Circuit and method for detecting and correcting data clocking errors
440	6876240	Wide range multi-phase delay-locked loop
441	6873669	Clock signal reproduction device
442	6873666	Circuit and method for symbol timing recovery in phase modulation systems
443	6868134	Method and apparatus for recovering a clock signal from an asynchronous data signal
444	6865234	Pair-swap independent trellis decoder for a multi-pair gigabit transceiver
445	6864734	Semiconductor integrated circuit
446	6864672	High resolution phase frequency detectors
447	6862332	Clock reproduction circuit
448	6859912	Method and circuit arrangement for clock recovery
449	6859107	Frequency comparator with hysteresis between locked and unlocked conditions
450	6856661	Using phase interpolator information to detect a loss of lock condition during recovery of a clock signal from a received data stream
451	6856659	Clock recovery method in digital signal sampling
452	6856658	Digital PLL circuit operable in short burst interval
453	6856207	Jitter-less phase detector in a clock recovery circuit
454	6853696	Method and apparatus for clock recovery and data qualification
455	6853223	Phase comparator and clock recovery circuit
456	6850584	Clock regeneration circuit and optical signal receiver using the same
457	6850583	Clock generation apparatus
458	6850581	Timing circuit
459	6850580	Bit synchronizing circuit
460	6850576	Method and apparatus for reproducing timing, and a demodulating apparatus that uses the method and apparatus for reproducing timing
461	6847789	Linear half-rate phase detector and clock and data recovery circuit
462	6847694	Method for determining the sampling phase and method for synchronization word detection using the phase detection method
463	6839861	Method and system for selecting data sampling phase for self timed interface logic
464	6838945	Data resynchronization circuit
2004
465	6836522	CLOCK SIGNAL EXTRACTING CIRCUIT, PARALLEL DIGITAL INTERFACE INCLUDING CLOCK SIGNAL EXTRACTING CIRCUIT, CLOCK SIGNAL EXTRACTING METHOD AND PARALLEL DATA BIT SIGNAL SYNCHRONIZING METHOD USING CLOCK SIGNAL EXTRACTING METHOD
466	6836503	Apparatus for data recovery in a synchronous chip-to-chip system
467	6836188	PLL circuit and method for eliminating self-jitter in a signal which is received by a control circuit
468	6834367	Built-in self test system and method for high speed clock and data recovery circuit
469	6831523	Auto-detection between referenceless and reference clock mode of operation
470	6831491	Systems and methods for correcting phase locked loop tracking error using feed-forward phase modulation
471	6829309	Phase detector for baud rate-sampled multi-state signal receiver
472	6823066	Digital access arrangement circuitry and method having current ramping control of the hookswitch
473	6823032	Telecommunication device including a clock generation unit
474	6819728	Self-correcting multiphase clock recovery
475	6815987	Phase locked loop
476	6807245	PLO device
477	6807228	Dynamic regulation of power consumption of a high-speed communication system
478	6807225	Circuit and method for self trimming frequency acquisition
479	6803796	Bi-direction switching and glitch/spike free multiple phase switch circuit
480	6801142	Method and device for detecting bits in a data signal
481	6801066	Apparatus for generating quadrature phase signals and data recovery circuit using the same
482	6798857	Clock recovery circuit
483	6795515	Method and apparatus for locating sampling points in a synchronous data stream
484	6795514	Integrated data clock extractor
485	6795510	Apparatus and method for symbol timing recovery
486	6794945	PLL for clock recovery with initialization sequence
487	6792059	Early/on-time/late gate bit synchronizer
488	6791420	Phase locked loop for recovering a clock signal from a data signal
489	6791388	Phase interpolator device and method
490	6785354	Lock detection system for use in high speed communication systems
491	6784714	Digital phase control using first and second delay lines
492	6782404	Jitter tolerance improvement by phase filtration in feed-foward data recovery systems
493	6782353	Instrument for measuring characteristic of data transmission system with high accuracy and clock reproducing circuit used therefor
494	6782300	Circuits and methods for extracting a clock from a biphase encoded bit stream and systems using the same
495	6778623	Apparatus for synchronizing the frame clock in units/nodes of data-transmitting systems
496	6778602	Multi-pair gigabit ethernet transceiver
497	6775344	Dropout resistant phase-locked loop
498	6775343	Receiver for signals in a discontinuous flow and corresponding receiving process
499	6774835	Method and device for detecting bits in a data signal
500	6772351	Method and apparatus for calibrating a multi-level current mode driver
501	6771729	Clock recovery circuit and transmitter-receiver therewith
502	6771725	Multi-pair gigabit ethernet transceiver
503	6768773	Arrangement for determining the phase position of a data signal
504	6765975	Method and apparatus for a tracking data receiver compensating for deterministic jitter
505	6765973	Low power apparatus and algorithm for sub-rate bit acquisition and synchronization of high speed clockless data streams
506	6765445	Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
507	6760389	Data recovery for non-uniformly spaced edges
508	6756819	Synchronization circuit
509	6754341	External resistor and method to minimize power dissipation in DC holding circuitry for a communication system
510	6753738	Impedance tuning circuit
511	6753712	Clock and data recovery circuit and clock control method thereof
512	6751745	Digital synchronization circuit provided with circuit for generating polyphase clock signal
513	6748027	CMI signal timing recovery
514	6741668	Clock recovery circuit and phase detecting method therefor
515	6738922	Clock recovery unit which uses a detected frequency difference signal to help establish phase lock between a transmitted data signal and a recovered clock signal
516	6738444	Apparatus and method of generating clock signal
517	6738419	Dynamic regulation of power consumption of a high-speed communication system
518	6737896	Synchronous circuit
519	6737859	Dynamic register with IDDQ testing capability
520	6735710	Clock extraction device
521	6731914	Determination of transmitter distortion
522	6731697	Symbol timing recovery method for low resolution multiple amplitude signals
523	6731691	Multi-pair gigabit ethernet transceiver having adaptive disabling of circuit elements
524	6724891	Integrated modem and line-isolation circuitry and associated method powering caller ID circuitry with power provided across an isolation barrier
525	6721916	System and method for trellis decoding in a multi-pair transceiver system
526	6721378	Circuit and method for receiving data
527	6721377	Method and circuit configuration for resynchronizing a clock signal
528	6714613	Apparatus and method for controlling the sampling clock in a data transmission system
529	6714612	Method and device for synchronization of phase mismatch in communication systems employing a common clock period
530	6714608	Multi-mode variable rate digital satellite receiver
531	6711226	Linearized digital phase-locked loop
532	6711220	Bit position synchronizer
533	6710811	Data processing device
534	6707848	Demodulator for a multi-pair gigabit transceiver
535	6707329	Clock recovery or detection of rapid phase transients
536	6704882	Data bit-to-clock alignment circuit with first bit capture capability
537	6704382	Self-sweeping autolock PLL
538	6704374	Local oscillator frequency correction in an orthogonal frequency division multiplexing system
539	6701466	Serial data communication receiver having adaptively minimized capture latch offset voltage
540	6701445	Frequency control system that stabilizes an output through both a counter and voltage-controlled oscillator via sampling a generated clock into four states
541	6701140	Digital receive phase lock loop with cumulative phase error correction and dynamically programmable correction rate
542	6700943	Digital bit synchronizer for low transition densities
543	6693985	Clock and data recovery method and apparatus
544	6690658	Indoor communication system and synchronization for a receiver
545	6690201	Method and apparatus for locating data transition regions
546	6687292	Timing phase acquisition method and device for telecommunications systems
547	6686803	Integrated circuit incorporating circuitry for determining which of at least two possible frequencies is present on an externally provided reference signal and method therefor
548	6686777	Phase detector having improved timing margins
549	6683548	Analog isolation system with digital communication across a capacitive barrier
550	6680991	Detection of frequency differences between signals
551	6680988	Non-linear extraction circuit and clock extraction circuit
552	6680970	Statistical methods and systems for data rate detection for multi-speed embedded clock serial receivers
553	6674822	Searching the optimal sampling instant in a TDMA packet transmission system
554	6674735	Radio receivers and methods of operation
2003
555	6671244	Information detecting circuit including adaptive equalizer and reproducing apparatus
556	6671074	Optical receiver for burst transmission system
557	6670853	Data recovery circuit and method thereof
558	6665362	Digital receive phase lock loop with phase-directed sample selection
559	6665359	Digital data separator
560	6665356	Sample timing control for demodulation of phase-modulated signals
561	6665018	Arrangement for retrieving data bits of a data signal
562	6664859	State machine based phase-lock-loop for USB clock recovery
563	6664804	Transmission circuit, data transfer control device, and electronic equipment
564	6661861	Voice-channel frequency synchronization
565	6661860	Multiple arbiter jitter estimation system and related techniques
566	6661727	Dynamic register with low clock rate testing capability
567	6654409	Direct digital access arrangement circuitry and method for connecting DSL circuitry to phone lines
568	6651179	Delay time judging apparatus
569	6650720	Phase lock loop and transconductance circuit for clock recovery
570	6650718	Timing reproducer and demodulator comprising this
571	6650186	Clock pulse and data regenerator for different data rates
572	6650146	Digital frequency comparator
573	6647079	Surface acoustic wave-based clock and data recovery circuit
574	6647027	Method and apparatus for multi-channel data delay equalization
575	6643518	Method and apparatus for synchronizing telecommunications devices via a transmission network
576	6643346	Frequency detection circuit for clock recovery
577	6643339	Receiver and receiving method
578	6642801	Oscillator using virtual stages for multi-gigabit clock recovery
579	6639956	Data resynchronization circuit
580	6639437	Method and apparatus for data sampling
581	6636987	Method and device for determining a synchronization fault in a network node
582	6636575	Cascading PLL units for achieving rapid synchronization between digital communications systems
583	6636092	Digital receive phase lock loop with cumulative phase error correction
584	6636080	Apparatus for detecting edges of input signal to execute signal processing on the basis of edge timings
585	6634813	All-optical bit phase sensing
586	6633184	Phase comparator and synchronizing signal extracting device
587	6631144	Multi-rate transponder system and chip set
588	6630868	Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
589	6628173	Data and clock extractor with improved linearity
590	6628112	System and method for detecting phase offset in a phase-locked loop
591	6625772	Circuit arrangement and method for minimizing bit errors
592	6624675	Free-running mode device for phase locked loop
593	6621880	Digital IF receiver
594	6621813	Methods and apparatus for synchronization in a wireless network
595	6621312	High bandwidth multi-phase clock selector with continuous phase output
596	6618829	Communication system, a synchronization circuit, a method of communicating a data signal, and methods of synchronizing with a data signal
597	6618459	Radio communication device and method of bit synchronization pull-in in the same
598	6618456	Asynchronous timing oscillator re-synchronizer and method
599	6617988	Apparatus for analogue information transfer
600	6617932	System and method for wide dynamic range clock recovery
601	6617837	Frequency locked loop speed up
602	6614863	Bit synchronization method and bit synchronization device
603	6614314	Non-linear phase detector
604	6611553	Isolation system with digital communication across a capacitive barrier
605	6611219	Oversampling data recovery apparatus and method
606	6611217	Initialization system for recovering bits and group of bits from a communications channel
607	6608876	Phase control circuit and phase control method
608	6608875	Free-running-frequency adjustment circuit for a clock recovery system
609	6608871	Data slicers
610	6608829	Closed-loop synchronization arrangement for data transmission system
611	6606430	Passive optical network with analog distribution
612	6606365	Modified first-order digital PLL with frequency locking capability
613	6606361	Circuits, systems, and methods for providing a single output clock and output data stream from an interface having multiple clocks and an input data stream
614	6606360	Method and apparatus for receiving data
615	6603830	Synchronization method for a receiving unit and a receiving unit corresponding thereto
616	6603829	Programmable phase matching
617	6603299	Frequency locked loop speed up
618	6600797	Phase frequency synchronism circuit and optical receiver
619	6597754	Compensation of frequency pulling in a time-division duplexing transceiver
620	6597707	Circuitry, architecture and methods for synchronizing data
621	6597296	Center phase verifying circuit and center phase verifying method
622	6594331	Two phase digital phase locked loop circuit
623	6594326	Apparatus and method for synchronizing a control signal
624	6590457	Phase detector and clock regeneration device
625	6590426	Digital phase detector circuit and method therefor
626	6587560	Low voltage circuits powered by the phone line
627	6587532	Method of generating a clock signal in a module of a data transmission system, and correspondingly equipped data transmission system
628	6587531	Clock recovery circuit and a receiver having a clock recovery circuit
629	6587528	Systems and methods for extracting and digitizing phase and frequency information from an analog signal
630	6587525	System and method for high-speed, synchronized data communication
631	6586983	Signal phase adjustment circuit to set optimum phase
632	6586977	Four quadrant analog mixer-based delay-locked loop for clock and data recovery
633	6584163	Shared data and clock recovery for packetized data
634	6580773	Method and device for aligning synchronous digital signals
635	6580770	Information regenerating apparatus and information regenerating method
636	6580763	Method and apparatus for controlling the decision threshold and sampling instant of a data generator
637	6580376	Apparatus and method for decimating a digital input signal
638	6577730	Modular digital telephone system and method including an universal telephony shelf
639	6577729	Alarm display and method
640	6577696	Method for data regeneration
641	6577695	Emulating narrow band phase-locked loop behavior on a wide band phase-locked loop
642	6577689	Timing recovery system for a 10 BASE-T/100 BASE-T ethernet physical layer line interface
643	6577167	Clock signal producing circuit immediately producing clock signal synchronized with input signal
644	6573698	Clock synchronizing method and circuit varying a phase of a synchronous clock in one direction or the other according to a phase difference of the synchronous clock from a reference clock
645	6570982	Digital clocking synchronizing mechanism
646	6570981	Device and method for expanding legacy switches
647	6570944	Apparatus for data recovery in a synchronous chip-to-chip system
648	6570513	Isolation system with digital communication across a capacitive barrier
649	6570424	Signal phase adjustment circuit to set optimum phase
650	6567518	Method of field programmable gate array configuration
651	6567517	Timing and switching array and method
652	6567484	Burst synchronizing circuit
653	6563922	Arbitration mechanism
654	6563894	Method and apparatus for acquiring and tracking the sampling phase of a signal
655	6563888	Data transmission/reception system and data reception device
656	6563333	Dynamic register with IDDQ testing capability
657	6560007	Bit-phase synchronized optical pulse stream local generator
658	6559692	Output driver for a 10baset/100basetx ethernet physical layer line interface
659	6556640	Digital PLL circuit and signal regeneration method
660	6556633	Timing recovery for data sampling of a detector
661	6552619	Multi-channel clock recovery circuit
662	6549604	Clock recovery and detection of rapid phase transients
663	6549598	Clock signal extraction circuit
664	6549596	Fully digital phase aligner
665	6549571	Circuitry and method for duty measurement
666	6545546	PLL circuit and optical communication reception apparatus
667	6545507	Fast locking CDR (clock and data recovery circuit) with high jitter tolerance and elimination of effects caused by metastability
668	6539071	Frequency correction at the receiver end in a packet transmission system
669	6538483	Method and apparatus for data sampling
670	6538475	Phase detector
671	6535946	Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock
672	6535527	Low latency, low power deserializer
673	6535032	Data receiver technology
674	6535023	Linearized digital phase-locked loop method
675	6531927	Method to make a phase-locked loop's jitter transfer function independent of data transition density
676	6529148	Apparatus and method for acquisition of an incoming data stream
677	6526112	System for clock and data recovery for multi-channel parallel data streams
678	6526109	Method and apparatus for hybrid smart center loop for clock data recovery
679	6526106	Synchronous circuit controller for controlling data transmission between asynchrous circuit
680	6525616	Circuit for locking an oscillator to a data stream
681	6525588	Clock control circuit and method
682	6525520	Pulse detector for determining phase relationship between signals
683	6523177	Cable television system with digital reverse path architecture
684	6522745	Digital access arrangement circuitry and method having a synthesized ringer impedance for connecting to phone lines
685	6519303	Clock reproduction circuit
686	6516024	Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with low distortion and current limiting
687	6513127	Frequency difference detector with programmable channel selection
688	6509990	Optical timing detection
689	6509801	Multi-gigabit-per-sec clock recovery apparatus and method for optical communications
690	6509773	Phase interpolator device and method
691	6507915	Clock and data signal separator circuit
692	6504887	Apparatus and method for an error minimizing phase locked loop
693	6504864	Digital access arrangement circuitry and method for connecting to phone lines having a second order DC holding circuit
2002
694	6501583	Optical receiver module optical transmitter module phase-locked loop circuit voltage-controlled oscillator and frequency response controllable amplifier
695	6501388	Radio signal selective-calling receiver and method of receiving radio signals
696	6498825	Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with programmable current limiting
697	6498824	Phase control signals for clock recovery circuits
698	6498670	Optical receiving apparatus and method
699	6496555	Phase locked loop
700	6496552	Timing circuit
701	6496046	Method for increasing the control bandwidth of a frequency control circuit
702	6493539	Providing an accurate timing source for locating the geographical position of a mobile
703	6493396	Phase shift key burst receiver having improved phase resolution and timing and data recovery
704	6490329	Device and method for generating clock signals from a single reference frequency signal and for synchronizing data signals with a generated clock
705	6490298	Apparatus and methods of multiplexing data to a communication channel
706	6487263	Decoding of a biphase modulated bitstream and relative self-synchronizing frequency divider with noninteger ratio
707	6486650	Frequency locked loop speed up
708	6483871	Phase detector with adjustable set point
709	6483360	Digital phase control using first and second delay lines
710	6483288	Engagement detection circuit
711	6480602	Ring-detect interface circuitry and method for a communication system
712	6477200	Multi-pair gigabit ethernet transceiver
713	6477199	Dynamic regulation of power consumption of a high-speed communication system
714	6476948	Accurate synchronizing device
715	6473455	Method for compensating a phase delay of a clock signal
716	6473439	Method and apparatus for fail-safe resynchronization with minimum latency
717	6473131	System and method for sampling an analog signal level
718	6472913	Method and apparatus for data sampling
719	6467043	Adjusting and measuring the timing of a data strobe signal with a first delay line and through additional delay line adapted to receive pulse signal
720	6466630	Symbol synchronization in a continuous phase modulation communications receiver
721	6463109	Multiple channel adaptive data recovery system
722	6459746	Multi-pair gigabit ethernet transceiver
723	6459730	Apparatus for, and method of, processing signals transmitted over a local area network
724	6456831	Amplitude change time activated phase locked controller in a selective call receiver
725	6456712	Separation of ring detection functions across isolation barrier for minimum power
726	6456677	Synchronization equipment
727	6456602	Method and apparatus for achieving frequency diversity by use of multiple images
728	6456552	Dynamic register with low clock rate testing capability
729	6456128	Oversampling clock recovery circuit
730	6442703	Clock regenerator
731	6442271	Digital isolation system with low power mode
732	6442225	Multi-phase-locked loop for data recovery
733	6442213	Digital isolation system with hybrid circuit in ADC calibration loop
734	6441664	Signal phase adjustment circuit to set optimum phase
735	6438567	Method for selective filtering
736	6438081	Storage media reading system
737	6433599	Circuit for data signal recovery and clock signal regeneration
738	6430242	Initialization system for recovering bits and group of bits from a communications channel
739	6430240	Receiver to recover data encoded in a serial communication channel
740	6430229	Capacitive isolation system with digital communication and power transfer
741	6426984	Apparatus and method for reducing clock signal phase skew in a master-slave system with multiple latent clock cycles
742	6424687	Method and device for alignment of audio data frames using interpolation and decimation
743	6421404	Phase-difference detector and clock-recovery circuit using the same
744	6420962	AUTOMATIC IDENTIFICATION LEVEL CONTROL CIRCUIT, IDENTIFICATION LEVEL CONTROL METHOD, AUTOMATIC IDENTIFICATION PHASE CONTROL CIRCUIT, IDENTIFICATION PHASE CONTROL METHOD, OPTICAL RECEIVER, AND OPTICAL COMMUNICATION SYSTEM
745	6420915	Signal comparison system and method for detecting and correcting timing errors
746	6417698	Linearized digital phase-locked loop method
747	6415004	Phase detector, timing recovery device using the same, and a demodulator using the timing recovery device
748	6414535	Semiconductor device realizing internal operational factor corresponding to an external operational factor stably regardless of fluctuation of external operational factor
749	6414528	Clock generation circuit, serial/parallel conversion device and parallel/serial conversion device together with semiconductor device
750	6411665	Phase locked loop clock extraction
751	6411661	Digital timing recovery loop for GMSK demodulators
752	6411117	Dynamic register with IDDQ testing capability
753	6408034	Framed delta sigma data with unlikely delta sigma data patterns
754	6407682	High speed serial-deserializer receiver
755	6407583	Logic circuit having phase-controlled data receiving interface
756	6404833	Digital phase synchronizing apparatus
757	6404771	Clock lead/lag extraction in an isochronous data bus
758	6404363	Circuit for recovering digital clock signal and method thereof
759	6400784	Synchronization system and method for digital communication systems
760	6396604	Dark pulse TDMA optical network
761	6396329	Method and apparatus for receiving high speed signals with low latency
762	6393080	Apparatus comprising clock control circuit and device using internal clock signal synchronized to external clock signal
763	6393071	Circuit and method of identifying a burst frequency
764	6392495	Frequency detector circuits and systems
765	6392494	Frequency comparator and clock regenerating device using the same
766	6392457	Self-aligned clock recovery circuit using a proportional phase detector with an integral frequency detector
767	6389548	Pulse run-length measurement for HF data signal by dividing accumulated phase difference between first and second zero-crossings by single-cycle range using multiple cycle range sawtooth waveform
768	6389134	Call progress monitor circuitry and method for a communication system
769	6389090	Digital clock/data signal recovery method and apparatus
770	6389088	Synchronization and tracking in a digital communication system
771	6389061	Isolation system with digital communication across a capacitive barrier
772	6388753	All-optical bit phase sensing and clock recovery apparatus and methods
773	6385235	Direct digital access arrangement circuitry and method for connecting to phone lines
774	6377647	PLL circuit
775	6377642	System for clock recovery
776	6377101	Variable delay circuit and semiconductor integrated circuit device
777	6377081	Phase detection circuit
778	6374361	Skew-insensitive low voltage differential receiver
779	6373911	Bit synchronization circuit
780	6373900	Multi-pair transceiver decoder system with low computation slicer
781	6373305	Digital receive phase lock loop with residual phase error and cumulative phase error correction
782	6370212	Method and device for decoding manchester encoded data
783	6369659	Clock recovery system using wide-bandwidth injection locked oscillator with parallel phase-locked loop
784	6366632	Accounting for clock slew in serial communications
785	6366628	Method and circuit for sampling timing recovery
786	6366574	Method and device for recovering synchronization on a signal transmitted to a mobile-telephone receiver
787	6366150	Digital delay line
788	6366146	Phase-locked loop based clock phasing implementing a virtual delay
789	6366145	Linearized digital phase-locked loop
790	6363129	Timing recovery system for a multi-pair gigabit transceiver
791	6362693	Frequency detection method for adjusting a clock signal frequency and a frequency detector circuit for carrying out the method
792	6359983	Digital isolation system with data scrambling
793	6359946	Clock synchronization for asynchronous data transmission
794	6359486	Modified phase interpolator and method to use same in high-speed, low power applications
795	6359481	Data synchronization circuit
796	6356612	Clock signal reproducing apparatus
797	6356610	System to avoid unstable data transfer between digital systems
798	6356160	Phase lock loop and automatic gain control circuitry for clock recovery
799	6356156	Method and system for managing reference signals for network clock synchronization
800	6356127	Phase locked loop
801	6349122	Apparatus and method for data synchronizing and tracking
802	6347128	Self-aligned clock recovery circuit with proportional phase detector
803	6343364	Method and device for local clock generation using universal serial bus downstream received signals DP and DM
804	6342797	Delayed locked loop clock generator using delay-pulse-delay conversion
805	6341149	Clock control device for a non-disruptive backup clock switching
806	6341148	Method and apparatus for minimizing transient sampling fluctuations upon transition between modes of communication
807	6341147	Maximum likelihood symbol timing estimator
808	6340910	Clock signal control method and circuit and data transmitting apparatus employing the same
809	6339625	Clock generation circuit
810	6337891	Clock synchronization method
811	6337650	System and method for regenerating clock signal
812	6335931	System for synchronizing network data transmission and collection
2001
813	6333981	Shelf driver unit and method
814	6333939	Synchronization of a low power oscillator with a reference oscillator in a wireless communication device utilizing slotted paging
815	6331999	Serial data transceiver architecture and test method for measuring the amount of jitter within a serial data stream
816	6331792	Circuit and method for unlimited range frequency acquisition
817	6330330	External resistor and method to minimize power dissipation in DC holding circuitry for a communication system
818	6330328	Modular digital telephone system and method including an universal telephony shelf
819	6327666	System and method for external timing using a complex rotator
820	6324236	Phase detector arrangement
821	6324225	Timing recovery for data sampling of a detector
822	6320921	Fast acquisition clock recovery using a directional frequency-phase detector
823	6317417	Method and apparatus for dynamic signal modification on a parallel bus
824	6317005	Process of clock recovery during the sampling of digital-type signals
825	6316966	Apparatus and method for servo-controlled self-centering phase detector
826	6314151	Phase comparator operable at half frequency of input signal
827	6314149	Method and apparatus for rephasing a voltage controlled clock, or the like
828	6310927	First order tuning circuit for a phase-locked loop
829	6310521	Reference-free clock generation and data recovery PLL
830	6310498	Digital phase selection circuitry and method for reducing jitter
831	6307906	Clock and data recovery scheme for multi-channel data communications receivers
832	6307905	Switching noise reduction in a multi-clock domain transceiver
833	6307904	Clock recovery circuit
834	6307891	Method and apparatus for freezing a communication link during a disruptive event
835	6307869	System and method for phase recovery in a synchronous communication system
836	6307413	Reference-free clock generator and data recovery PLL
837	6304622	Flexible bit rate clock recovery unit
838	6304582	Synchronization system using multiple modes of operation
839	6304113	Device for synchronizing a reference event of an analog signal on a clock
840	6304071	Phase detector that samples a read signal at sampling points and delay
841	6301318	Pipelined phase detector for clock recovery
842	6298133	Telephone line interface architecture using ringer inputs for caller ID data
843	6298104	Clock recovery circuit
844	6298103	Flexible clock and data recovery module for a DWDM optical communication system with multiple clock rates
845	6297755	Analog isolation system with digital communication across a capacitive barrier
846	6297705	Circuit for locking an oscillator to a data stream
847	6295327	Method and apparatus for fast clock recovery phase-locked loop with training capability
848	6292521	Phase lock device and method
849	6289070	Digital isolation system with ADC offset calibration including coarse offset
850	6289067	Device and method for generating clock signals from a single reference frequency signal and for synchronizing data signals with a generated clock
851	6289047	Dynamic regulation of power consumption of a high-speed communication system
852	6288614	Phase-locked loop with improvements on phase jitter, MTIE tracking speed and locking speed
853	6285726	10/100 mb clock recovery architecture for switches, repeaters and multi-physical layer ports
854	6285721	Method for assisting simple synchronization to the carrier of a dispersed-energy QPSK signal
855	6285261	Digital clock recovery loop
856	6285219	Dual mode phase and frequency detector
857	6282042	Data processing apparatus and methods
858	6282007	Optical timing detection
859	6278868	Transceiver circuit including a circuit for measuring the delay introduced by telephone lines
860	6278755	Bit synchronization circuit
861	6278754	Demodulation of asynchronously sampled data by means of detection-transition sample estimation in a shared multi-carrier environment
862	6278752	System and method to prevent error propagation
863	6278746	Timing recovery loop circuit in a receiver of a modem
864	6278741	Timing recovery circuit in QAM modems
865	6278710	Enhancements to time synchronization in distributed systems
866	6275550	Data transmission device
867	6275547	Clock recovery circuit
868	6275544	Baseband receiver apparatus and method
869	6275519	Frame synchronization in a digital communications system
870	6272318	Pager capable of automatically switching and setting a plurality of transmission speeds
871	6272193	Receiver to recover data encoded in a serial communication channel
872	6272173	Efficient fir filter for high-speed communication
873	6269137	Method and apparatus for fast burst mode data recovery
874	6269135	Digital phase discriminations based on frequency sampling
875	6269128	Clock recovery control in differential detection
876	6266799	Multi-phase data/clock recovery circuitry and methods for implementing same
877	6266383	Clock reproduction circuit and data transmission apparatus
878	6266381	Frequency control arrangement
879	6266377	Method of timing recovery convergence monitoring in modems
880	6266200	Magnetic disk storage apparatus
881	6263035	System and method for adjusting a phase angle of a recovered data clock signal from a received data signal
882	6263032	Phase detector estimator
883	6263013	Fast tracking of PN synchronization in a direct-sequence spread-spectrum digital communications system
884	6262998	Parallel data bus integrated clocking and control
885	6262611	High-speed data receiving circuit and method
886	6259755	Data clock recovery PLL circuit using a windowed phase comparator
887	6259328	Method and system for managing reference signals for network clock synchronization
888	6259326	Clock recovery from a burst-mode digital signal each packet of which may have one of several predefined frequencies
889	6256362	Frequency acquisition circuit and method for a phase locked loop
890	6256361	D.T.R.M. data timing recovery module
891	6256337	Rapid acquisition of PN synchronization in a direct-sequence spread-spectrum digital communications system
892	6256335	Slow tracking of PN synchronization in a direct-sequence spread-spectrum digital communications system
893	6255876	Simple glitchless phase selection method for multiplexing the phase interpolated clocks
894	6253345	System and method for trellis decoding in a multi-pair transceiver system
895	6252904	High-speed decoder for a multi-pair gigabit transceiver
896	6252453	Device and method for signal resampling between phase related clocks
897	6249558	Method for transmitting digital data impulses
898	6249555	Low jitter digital extraction of data from serial bitstreams
899	6249544	System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system
900	6249192	Clock injection system
901	6249188	Error-suppressing phase comparator
902	6249160	Clock reproduction and identification apparatus
903	6249159	Frequency control circuit having increased control bandwidth at lower device operating speed
904	6246738	Phase modulated reduction of clock wander in synchronous wide area networks
905	6246737	Apparatus for measuring intervals between signal edges
906	6246704	Automatic on-chip clock tuning methodology and circuitry
907	6246276	Clock signal cleaning circuit
908	6243388	Broadband video switch that performs program merging and method therefor
909	6243372	Methods and apparatus for synchronization in a wireless network
910	6242965	Phase synchronization
911	6239629	Signal comparison system and method for detecting and correcting timing errors
912	6236697	Clock recovery for multiple frequency input data
913	6236696	Digital PLL circuit
914	6236695	Output buffer with timing feedback
915	6236693	Generator for delay-matched clock and data signals
916	6236675	Pilot tone system and method to allow continuous synchronization in multipoint networks
917	6232813	Phase locked loop integrated circuits having fuse-enabled and fuse-disabled delay devices therein
918	6229865	Phase difference detection circuit for liquid crystal display
919	6229862	Selective clock recovery from portions of digital data signal best suited therefor
920	6229859	System and method for high-speed, synchronized data communication
921	6229633	Optical sampling by modulating a pulse train
922	6226332	Multi-pair transceiver decoder system with low computation slicer
923	6225927	Analog isolation system with digital communication across a capacitive barrier
924	6223317	Bit synchronizers and methods of synchronizing and calculating error
925	6222922	Loop current monitor circuitry and method for a communication system
926	6222895	Phase-locked loop (PLL) circuit containing a sampled phase detector with reduced jitter
927	6222419	Over-sampling type clock recovery circuit using majority determination
928	6219394	Digital frequency sampling and discrimination
929	6218907	Frequency comparator and PLL circuit using the same
930	6215835	Dual-loop clock and data recovery for serial data communication
931	6212249	Data separation circuit and method
932	6212248	Shared path phase detector having phase indicator
933	6212246	Symbol-quality evaluation in a digital communications receiver
934	6212241	Digital modulated signal receiver
935	6212119	Dynamic register with low clock rate testing capability
936	6211741	Clock and data recovery PLL based on parallel architecture
937	6211714	System for Distributing Clocks
938	6208701	Synchronizing apparatus
939	6205192	Clock input control circuit
940	6205191	Method and apparatus for synchronizing a control signal
941	6204949	Method and device for extracting a timing signal
942	6204750	Interrogator for electronic identification system
943	6201865	Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with switchable time constants
944	6201831	Demodulator for a multi-pair gigabit transceiver
945	6198816	Capacitively coupled ring detector with power provided across isolation barrier
946	6198360	Quadrature current frequency modulation oscillator
947	6195784	Circuit for detecting reception errors in an asynchronous transmission
948	6192091	Circuit for reproducing a clock from a multilevel QAM signal
949	6191717	Analog isolation system with digital communication across a capactive barrier
950	6188738	Clock extraction circuit
951	6188687	Broadband switch that manages traffic and method therefor
952	6185510	PLL jitter measuring method and integrated circuit therewith
953	6185261	Determination of transmitter distortion
954	6184734	Digital phase locked loop
955	6181757	Retiming method and means
956	6181755	Receiver synchronisation in idle mode
957	6178216	Digital phase locked loop circuit and method therefor
958	6178215	Synchronization system for reducing slipping
959	6178213	Adaptive data recovery system and methods
960	6178212	Retiming circuit and method for performing retiming
961	6178206	Method and apparatus for source synchronous data transfer
962	6178198	Apparatus for, and method of, processing signals transmitted over a local area network
963	6177813	Low frequency detection circuit
964	6175885	System for series to parallel conversion of a low-amplitude and high frequency signal
965	6175605	Edge triggered delay line, a multiple adjustable delay line circuit, and an application of same
966	6175285	Injection tuned resonant circuits
2000
967	6167134	External resistor and method to minimize power dissipation in DC holding circuitry for a communication system
968	6167132	Analog successive approximation (SAR) analog-to-digital converter (ADC)
969	6167097	Frequency generating circuit
970	6166775	Video signal sampling circuit and an image display apparatus including the same
971	6166572	Voltage-controlled delay line, direct phase controlled voltage-controlled oscillator, clock/data recovery circuit, and clock/data recovery apparatus
972	6163582	Differentiator, rectifier, mixer, and low-pass filter circuit
973	6163276	System for remote data collection
974	6160885	Caller ID circuit powered through hookswitch devices
975	6160860	Phase-locked loop (PLL) circuit containing a frequency detector for improved frequency acquisition
976	6157232	Local clock generator
977	6157229	Skew compensation device
978	6154512	Digital phase lock loop with control for enabling and disabling synchronization
979	6154511	Clock extraction circuit
980	6154509	Data phase recovery system
981	6154506	Timing recovery and tracking method and apparatus for data signals
982	6154468	Fast sync-byte search scheme for packet framing
983	6151356	Method and apparatus for phase detection in digital signals
984	6151146	Method and apparatus for shaping a binary signal
985	6150859	Digital delay-locked loop
986	6150858	Phase compensation circuit of digital processing PLL
987	6147527	Internal clock generator
988	6144709	Method of detecting a call set-up burst, and a receiver
989	6144326	Digital isolation system with ADC offset calibration
990	6137850	Digital bit synchronizer for low transition densities
991	6137827	Isolation system with digital communication across a capacitive barrier
992	6137809	Quantization noise compensator apparatus and method
993	6137332	Clock signal generator and data signal generator
994	6137326	Clock signal producing device
995	6134276	Timing recovery system
996	6133802	Synchronous carrier recovery circuit and injection locked oscillator
997	6130584	Over-sampling type clock recovery circuit with power consumption reduced
998	6130577	Digital demodulators for phase modulated and amplitude-phase modulated signals
999	6128357	Data receiver having variable rate symbol timing recovery with non-synchronized sampling
1000	6128248	Semiconductor memory device including a clocking circuit for controlling the read circuit operation
1001	6127897	Zero-crossing detection type clock recovery circuit operated at symbol rate
1002	6127896	Phase locked loop having control circuit for automatically operating VCO on an optimum input/output characteristic
1003	6127884	Differentiate and multiply based timing recovery in a quadrature demodulator
1004	6125158	Phase locked loop and multi-stage phase comparator
1005	6124762	Over-sampling type clock recovery circuit with power consumption reduced
1006	6122336	Digital clock recovery circuit with phase interpolation
1007	6122335	Method and apparatus for fast burst mode data recovery
1008	6121804	High frequency CMOS clock recovery circuit
1009	6118770	Voice-channel frequency synchronization
1010	6118317	Clock synchronizing system and synchronizing method
1011	6118316	Semiconductor integrated circuit including plurality of phase-locked loops
1012	6115438	Method and circuit for detecting a spurious lock signal from a lock detect circuit
1013	6115437	Synchronizing circuit
1014	6114889	Phase locked loop for recovering clock
1015	6114879	Phase detectors
1016	6111926	Bit synchronizing circuit having high synchronization characteristics
1017	6111925	Clock synchronized delay scheme using edge-triggered delay lines and latches with one clock lock time
1018	6107948	Analog isolation system with digital communication across a capacitive barrier
1019	6107946	High speed serial link for fully duplexed data communication
1020	6107891	Integrated circuit and method for low noise frequency synthesis
1021	6107848	Phase synchronisation
1022	6104915	Synchronization system using aging prediction
1023	6104794	Architecture for minimum loop current during ringing and caller ID
1024	6104769	Method and apparatus for acquiring and tracking the sampling phase of a signal
1025	6104762	Timing recovery apparatus and a diversity communication apparatus using the same
1026	6104228	Phase aligner system and method
1027	6101230	Sampling clock signal recovery device and method in receiving terminal of DMT system
1028	6100765	Digital clock recovery loop
1029	6100737	Scanner circuit for digital signals with high data rate
1030	6097777	Phase locked loop circuit
1031	6097768	Phase detector for carrier recovery in a DQPSK receiver
1032	6097766	Timing phase synchronization detecting circuit and demodulator
1033	6097322	Device and method for controlling the sampling of a signal conveying binary information coded according to a two-phase code
1034	6094082	DLL calibrated switched current delay interpolator
1035	6091787	Symbol lock detector
1036	6088415	Apparatus and method to adaptively equalize duty cycle distortion
1037	6088414	Method of frequency and phase locking in a plurality of temporal frames
1038	6088410	False-synchronization detection device for bit-synchronous circuit of . .pi/4-shift DQPSK demodulator
1039	6088311	Optical disc device
1040	6087869	Digital PLL circuit
1041	6087857	Clock signal phase comparator
1042	6084931	Symbol synchronizer based on eye pattern characteristics having variable adaptation rate and adjustable jitter control, and method therefor
1043	6081905	Method and apparatus for generating a clock signal from a plurality of clock phases
1044	6081699	FM multiplex broadcasting receiver for receiving RDS and DARC signals
1045	6081561	Method and apparatus for receiving and reconstituting a data signal employing oversampling and selection of a sampled data signal remote from transitions in the data signal
1046	6078630	Phase-based receiver with multiple sampling frequencies
1047	6075825	Timing and data recovery circuit for ultra high speed optical communication system
1048	6075416	Method, architecture and circuit for half-rate clock and/or data recovery
1049	6075408	OQPSK phase and timing detection
1050	6075388	Phase detector with extended linear range
1051	6075387	Phase detector
1052	6072842	Carrier-recovery loop with stored initialization in a radio receiver
1053	6072794	Digital trunk interface unit for use in remote access system
1054	6072370	Clock extraction circuit
1055	6072345	Semiconductor device realizing internal operational factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor
1056	6072344	Phase-locked loop (PLL) circuit containing a phase detector for achieving byte alignment
1057	6069927	Digital signal link
1058	6067334	Device for and method of aligning in time digital signals, for example a clock signal and data stream
1059	6066982	Phase locked loop apparatus for pulse signal demodulation
1060	6066970	Circuit for producing clock pulses from an inputted base band signal
1061	6064707	Apparatus and method for data synchronizing and tracking
1062	6064273	Phase-locked loop having filter with wide and narrow bandwidth modes
1063	6064244	Phase-locked loop circuit permitting reduction of circuit size
1064	6064236	Phase detector and timing extracting circuit using phase detector
1065	6060923	PLL device having a simple design yet achieving reliable and accurate operation
1066	6058152	Phase comparison method and apparatus for digital signals
1067	6058151	Digital phase shift phase-locked loop for data and clock recovery
1068	6057730	Digital demodulator
1069	6055286	Oversampling rotational frequency detector
1070	6055281	Passband DQPSK detector for a digital communications receiver
1071	6055280	High data rate digital demodulator and bit synchronizer
1072	6052423	Synchronization and tracking in a digital communication system
1073	6052422	Analog signal offset cancellation circuit and method
1074	6052034	Method and apparatus for all digital holdover circuit
1075	6049708	Mobile communication apparatus for intermittently receiving a broadcasting signal at a corrected reception timing
1076	6049239	Variable delay circuit and semiconductor integrated circuit device
1077	6044123	Method and apparatus for fast clock recovery phase-locked loop with training capability
1078	6044122	Digital phase acquisition with delay locked loop
1079	6041090	Data sampling and recover in a phase-locked loop (PLL)
1080	6041089	Bit phase synchronizing method and bit phase synchronizing circuit
1081	6040743	Voltage controlled oscillator for recovering data pulses from a data input stream having digital data with an unknown phase
1082	6040742	Charge-pump phase-locked loop with DC current source
1083	6038264	Data receiving apparatus
1084	6038254	Adaptive filtering method and apparatus to compensate for a frequency difference between two clock sources
1085	6035409	1000 mb phase picker clock recovery architecture using interleaved phase detectors
1086	6034554	Phase detector for high speed clock recovery from random binary signals
1087	6031886	Digital phase alignment apparatus in consideration of metastability
1088	6031428	Steered frequency phase locked loop
1089	6028898	Signal regenerator
1090	6028462	Tunable delay for very high speed
1091	6021503	Bit synchronization for interrogator
1092	6020765	Frequency difference detector for use with an NRZ signal
1093	6018556	Programmable loop filter for carrier recovery in a radio receiver
1999
1094	6009134	Timing restoration circuit for pulse amplitude modulation (PAM)-type communication system
1095	6009132	System and method for obtaining clock recovery from a received data signal
1096	6008699	Digital receiver locking device
1097	6002731	Received-data bit synchronization circuit
1098	6002730	Method for detecting data and device therefor of data storing unit
1099	6002728	Synchronization and tracking in a digital communication system
1100	6002710	Timing recovery for a pseudo-random noise sequence in a direct-sequence spread-spectrum communications system
1101	6002709	Verification of PN synchronization in a direct-sequence spread-spectrum digital communications system
1102	6002538	PRML regenerating apparatus having adjusted slice levels
1103	6002279	Clock recovery circuit
1104	6002274	Oversampled state machine for jitter tolerant pulse detection
1105	5999580	Data signal timing correction device, filter device, and wireless portable communication terminal
1106	5999577	Clock reproducing circuit for packet FSK signal receiver
1107	5999353	Magnetic disk storage apparatus with phase sync circuit having controllable response characteristic
1108	5991349	Data processing device
1109	5991348	Method and apparatus for regenerating symbol timing from a probing signal in a system having non-linear network and codec distortion
1110	5991346	Method for determining the best time to sample an information signal
1111	5991336	System and method for optimizing high speed data transmission
1112	5987085	Clock recovery circuit
1113	5987073	Symbol timing recovery network for a carrierless amplitude phase (CAP) signal
1114	5982834	Clock recovery system for high speed small amplitude data stream
1115	5982237	Digital clock recovery loop
1116	5982209	Clock circuit and corresponding method for generating and supplying a clock signal to electronic devices
1117	5978427	Phase-locked loop circuit having a lock state detecting function
1118	5974097	Method and apparatus for receiving a data signal and a digital filter circuit
1119	5969631	Method and control system for the synchronized transmission of digital data
1120	5966416	Verification of PN synchronization in a spread-spectrum communications receiver
1121	5963608	Clock extractor for high speed, variable data rate communication system
1122	5963606	Phase error cancellation method and apparatus for high performance data recovery
1123	5963604	Communication signal receiver with sampling frequency control
1124	5963603	Timing recovery and frame synchronization in communications systems
1125	5963594	Vector tracking filter
1126	5963590	Method for receiving digital radio signals and a digital radio signals receiver
1127	5960042	Method in a selective call receiver for synchronizing to a multi-level radio signal
1128	5959563	Analogue to digital converter with adaptive sample timing based on statistics of sample values
1129	5956376	Apparatus for varying a sampling rate in a digital demodulator
1130	5955904	Semiconductor integrated circuit with appropriate data output timing and reduced power consumption
1131	5953690	Intelligent fiberoptic receivers and method of operating and manufacturing the same
1132	5953648	System and method for estimating clock error in a remote communication device
1133	5953386	High speed clock recovery circuit using complimentary dividers
1134	5953142	Variable delay apparatus for optical signals
1135	5952892	Low-gain, low-jitter voltage controlled oscillator circuit
1136	5952888	Roving range control to limit receive PLL frequency of operation
1137	5950115	GHz transceiver phase lock loop having autofrequency lock correction
1138	5948083	System and method for self-adjusting data strobe
1139	5946358	Receiver circuit for a mobile communications system
1140	5944842	Method and apparatus for data encoding and communication over noisy media
1141	5943378	Digital signal clock recovery
1142	5942927	Clock signal generator for a logic analyzer controlled to lock both edges to a reference clock signal
1143	5940449	Signal processing system for digital signals
1144	5940435	Method for compensating filtering delays in a spread-spectrum receiver
1145	5939916	Phase shifter suitable for clock recovery systems
1146	5939912	Recovery circuit having long hold time and phase range
1147	5937020	Digital information signal reproducing circuit and digital information system
1148	5936968	Method and apparatus for multiplexing complete MPEG transport streams from multiple sources using a PLL coupled to both the PCR and the transport encoder clock
1149	5936678	Video signal processing device, information processing system, and video signal processing method
1150	5933058	Self-tuning clock recovery phase-locked loop circuit
1151	5926514	Apparatus for clock shifting in an integrated transceiver
1152	5926479	Multiple protocol personal communications network system
1153	5923704	Transmit clock generation system and method
1154	5923455	Data identifying device and light receiver using the same
1155	5920600	Bit phase synchronizing circuitry for controlling phase and frequency, and PLL circuit therefor
1156	5920220	Clock timing recovery methods and circuits
1157	5917873	Receiving apparatus, receiving method, and digital PLL circuit
1158	5917871	Bit synchronization circuit and method capable of correct bit synchronization for both 2-value and 4-value FSK transmission signals
1159	5917869	Apparatus and method for timing/carrier recovery in bandwidth-efficient communications systems
1160	5917856	Method for establishing a PAM signal connection using a training sequence
1161	5914991	Syncronizing a data acquisition device with a host
1162	5910742	Circuit and method for data recovery
1163	5909473	Bit synchronizing circuit
1164	5907558	Burst signal reception method and apparatus
1165	5905769	System and method for high-speed skew-insensitive multi-channel data transmission
1166	5905767	Timing recovery apparatus and a diversity communication apparatus using the same
1167	5905763	Receiving apparatus and decoder
1168	5905759	Data decoding circuit, voltage-controlled oscillation circuit, data decoding system and electronic equipment
1169	5905391	Master-slave delay locked loop for accurate delay or non-periodic signals
1170	5901189	Symmetrical correlator
1171	5901188	Method of and apparatus for RDS phase synchronization on the receiver side
1172	5901181	Circuit for restoring bits transmitted by a series signal
1173	5898741	Delayed detection MRC diversity circuit
1174	5896392	Device and method for automatically controlling decision points
1175	5894235	High speed data sampling system
1176	5892803	Determination of symbol sample timing using soft decisions
1177	5892792	12-chip coded spread spectrum modulation for direct conversion radio architecture in a digital cordless telephone
1178	5889828	Clock reproduction circuit and elements used in the same
1179	5889820	SPDIF-AES/EBU digital audio data recovery
1180	5889423	Generating circuit including selection between plural phase regulators
1181	5887040	High speed digital data retiming apparatus
1182	5887031	Symbol timing maintainance to enable low duty cycle receiver operation
1183	5886842	Control loops for low power, high speed PRML sampling data detection channel
1184	5886552	Data retiming circuit
1185	5883533	Clock signal generating device having a redundant configuration
1186	5875218	Variable rate clock for timing recovery and method therefor
1187	5874846	Method and apparatus for frequency generation in a synchronous system
1188	5874839	Timer apparatus
1189	5872819	Method and apparatus for facilitating symbol timing acquisition in a data communication receiver
1190	5872815	Apparatus for generating timing signals for a digital television signal receiver
1191	5872791	Method and apparatus for data encoding and communication over noisy media
1192	5870614	Thermostat controls dsp's temperature by effectuating the dsp switching between tasks of different compute-intensity
1193	5870446	Mechanism for automatically adjusting the phase of a transmission strobe clock signal to correct for misalignment of transmission clock and data signals
1194	5870442	Timing recovery arrangement
1195	5870441	Distributed clocking system
1196	5870046	Analog isolation system with digital communication across a capacitive barrier
1197	5867542	Clock phase detecting circuit and clock regenerating circuit each arranged in receiving unit of multiplex radio equipment
1198	5867541	Method and system for synchronizing data having skew
1199	5867046	Multi-phase clock generator circuit
1200	5864590	Procedure for transmission of information on a channel including a system for reception of data signals by sampling using clock signals
1201	5864248	Phase-locked loop circuit for reproducing clock signals synchronized with transmitter in receiver
1202	5859881	Adaptive filtering method and apparatus to compensate for a frequency difference between two clock sources
1203	5859671	Symbol timing recovery circuit and method
1204	5857095	Method for aligning a control signal and a clock signal
1998
1205	5850422	Apparatus and method for recovering a clock signal which is embedded in an incoming data stream
1206	5848109	Apparatus and process for sampling a serial digital signal
1207	5847891	PRML regenerating apparatus
1208	5844908	Digital delay system and method for digital cross connect telecommunication systems
1209	5844436	Method of recovering a sampling clock in a framed data communications format with reduced phase jitter and wander
1210	5841823	Method and apparatus for extracting a clock signal from a received signal
1211	5841602	PRML regenerating apparatus
1212	5838749	Method and apparatus for extracting an embedded clock from a digital data signal
1213	5838747	Asynchronous serial data transmission apparatus with edge interrupt operation and timer interrupt operation
1214	5838743	System for serial reception or reading of information
1215	5838172	Timing error detecting circuit
1216	5835544	Clock signal reproduction circuit and data reproduction circuit
1217	5835542	Digital data separator for separating data signals from clock signals in an encoded data stream
1218	5835541	Sampling phase synchronizing apparatus and bidirectional maximum likelihood sequence estimation scheme therefore
1219	5835498	System and method for sending multiple data signals over a serial link
1220	5835296	Apparatus for reproducing a digital information signal from a record carrier and counting the number of bits between two sync patterns
1221	5834980	Method and apparatus for supplying synchronization signals securing as clock signals with defined phase relationships
1222	5834950	Phase detector which eliminates frequency ripple
1223	5832047	Self timed interface
1224	5832039	Data processing circuit
1225	5831461	Method & apparatus for tracking characteristics of a data stream and a system incorporating the same
1226	5825834	Fast response system implementing a sampling clock for extracting stable clock information from a serial data stream with defined jitter characeristics and method therefor
1227	5825825	Method of processing multi-level signals for simple clock recovery
1228	5825818	Apparatus and method of recovering a timing signal in a transmission apparatus by adjusting tap coefficients
1229	5825570	PRML regenerating apparatus having reduced number of charge pump circuits
1230	5825211	Oversampled state machine for jitter tolerant pulse detection
1231	5822386	Phase recovery circuit for high speed and high density applications
1232	5822106	Synchronization of digital systems using optical pulses and mdoulators
1233	5820081	Process and circiuit arrangement for the transmission of digital control data
1234	5819076	Memory controller with low skew control signal
1235	5818890	Method for synchronizing signals and structures therefor
1236	5818889	Generation of phase shifted clock using selected multi-level reference clock waveform to select output clock phase
1237	5818887	Method for receiving a signal in a digital radio frequency communication system
1238	5818740	Decimator for use with a modem with time invariant echo path
1239	5818371	Coherent synchronization and processing of pulse groups
1240	5818365	Serial to parallel conversion with phase locked loop
1241	5815017	Forced oscillator circuit and method
1242	5812619	Digital phase lock loop and system for digital clock recovery
1243	5812617	Synchronization and battery saving technique
1244	5812508	Digital bit signal detection circuit for reproducing optical data
1245	5812497	Hybrid-synchronous type clock synchronizing apparatus of which dominant gain greater than sum of other gains network therewith, and clock synchronizing method thereof
1246	5809097	Low jitter phase detector for phase locked loops
1247	5809095	Synchronous signal output circuit
1248	5809009	Demodulator apparatus for digital radio communication receiver providing pseudo-coherent quadrature demodulation based on periodic estimation of frequency offset
1249	5805650	Circuit for data transmission in asynchronous mode with a free reception frequency locked on the transmission frequency
1250	5805018	High-speed demodulating method of burst data and apparatus for same
1251	5802123	Clock signal reproduction circuit and data reproduction circuit
1252	5802113	Clock signal recovery system for communication systems using quadrature amplitude modulation
1253	5802103	High speed serial link for fully duplexed data communication
1254	5799048	Phase detector for clock synchronization and recovery
1255	5799037	Receiver capable of demodulating multiple digital modulation formats
1256	5798720	Parallel to serial data converter
1257	5796796	Pointer adjustment jitter cancellation processor utilizing phase hopping and phase leaking techniques
1258	5796795	Data transferring circuit which aligns clock and data
1259	5796792	Data identifying device and light receiver using the same
1260	5796693	Data reproduction apparatus and data reproduction method
1261	5794020	Data transfer apparatus fetching reception data at maximum margin of timing
1262	5793823	Synchronization circuit that captures and phases an external signal
1263	5793822	Bist jitter tolerance measurement technique
1264	5793819	Radio communication terminal station
1265	5793227	Synchronizing logic avoiding metastability
1266	5790614	Synchronized clock using a non-pullable reference oscillator
1267	5790613	Cycle slip detector and phase locked loop circuit and digital signal reproducing apparatus using the same
1268	5790611	Method and apparatus for adjusting the phase of a digital signal
1269	5790607	Apparatus and method for recovery of symbol timing for asynchronous data transmission
1270	5789988	Clock recovery circuit for QAM demodulator
1271	5787132	Data communication system having improved synchronization capability
1272	5784422	Apparatus and method for accurate synchronization with inbound data packets at relatively low sampling rates
1273	5784416	Method and apparatus for detection of a communication signal
1274	5784185	Optical network
1275	5783956	Semiconductor device realizing internal operation factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor
1276	5781587	Clock extraction circuit
1277	5781049	Method of transmitting clock signal and device employing the same
1278	5778217	Parallel signal processing device for high-speed timing
1279	5778214	Bit-phase aligning circuit
1280	5777511	Data demodulation apparatus
1281	5774510	First-order loop control configuration for a phase-rotator based clock synchronization circuit
1282	5774508	Data synchronizer phase detector and method of operation thereof
1283	5774022	Digital clock recovery loop
1284	5768283	Digital phase adjustment circuit for asynchronous transfer mode and like data formats
1285	5764707	Method and apparatus for improved phase shift keyed (PSK) signal demodulation
1286	5764648	Method and apparatus for generating a transmission timing signal in a wireless telephone
1287	5761255	Edge-synchronized clock recovery unit
1288	5761254	Digital architecture for recovering NRZ/NRZI data
1289	5761210	Signal processing apparatus and method
1290	5760653	Phase-locked loop for clock recovery
1291	5757297	Method and apparatus for recovering a serial data stream using a local clock
1292	5754835	Source synchronized data transmission circuit
1293	5754607	Method and apparatus for achieving fast phase settling in a phase locked loop
1294	5754606	Clock signal regenerating circuit
1295	5754352	Synchronous read channel employing an expected sample value generator for acquiring a preamble
1296	5751775	Transmission circuit of a line encoded signal on a telephone line
1297	5745530	Digital data recovering apparatus
1298	5742188	Universal input data sampling circuit and method thereof
1299	5740210	Data discriminating circuit and a parallel data receiver using the same
1300	5740209	Method of adjusting for Doppler shifts in communication signals
1301	5737694	Highly stable frequency synthesizer loop with feedforward
1302	5734685	Clock signal deskewing system
1303	5734283	Demultiplexor circuit
1304	5732336	Receiver
1305	5731728	Digital modulated clock circuit for reducing EMI spectral density
1306	5731723	Half symbol delay calibration for phase window centering
1307	5727037	System and method to reduce phase offset and phase jitter in phase-locked and delay-locked loops using self-biased circuits
1308	5727004	Method and apparatus for data encoding and communication over noisy media
1309	5726992	Circuit for and method of assessing an RDS signal
1310	5726650	Adaptive manchester decoding with adjustable delay and power saving mode
1311	5726638	Method and device for serial communication
1312	5724397	Method for synchronizing a receiver
1313	5724360	Composite clock signal
1314	5721755	Serial transfer system
1315	5719908	Digital/analog bit synchronizer
1316	5717728	Data/clock recovery circuit
1317	5717715	Signal processing apparatus and method
1318	5714904	High speed serial link for fully duplexed data communication
1319	5712882	Signal distribution system
1320	5712585	Sysem for distributing clock signals
1321	5712580	Linear phase detector for half-speed quadrature clocking architecture
1322	5710649	Apparatus and methods for nulling non-random timing jitter in the transmission of digital optical signals
1323	5708687	Synchronized clock using a non-pullable reference oscillator
1324	5705947	Clock generator
1997
1325	5703914	Clock recovery circuit employing delay-and-difference circuit and pulse-sequence detection
1326	5703913	Timing signal generator
1327	5701296	Reliable burst signal detecting apparatus
1328	5699387	Phase offset cancellation technique for reducing low frequency jitters
1329	5699003	Delay circuit device
1330	5696800	Dual tracking differential manchester decoder and clock recovery circuit
1331	5696793	Phase difference detection circuit for extended partial-response class-4 signaling system
1332	5696462	Serial clock synchronization circuit
1333	5694441	Phase synchronizing apparatus, decoder and semiconductor integrated circuit device
1334	5694440	Data synchronizer lock detector and method of operation thereof
1335	5694434	Methods and apparatus for processing burst signals in a telecommunication system
1336	5694088	Phase locked loop with improved phase-frequency detection
1337	5694086	Precision, analog CMOS one-shot and phase locked loop including the same
1338	5694062	Self-timed phase detector and method
1339	5692166	Method and system for resynchronizing a phase-shifted received data stream with a master clock
1340	5692165	Memory controller with low skew control signal
1341	5692022	Bit synchronizer
1342	5692020	Signal processing apparatus and method
1343	5692014	Subsampled carrier recovery for high data rate demodulators
1344	5691660	Clock synchronization scheme for fractional multiplication systems
1345	5689534	Audio functional unit and system and method for configuring the same
1346	5689533	Refined timing recovery circuit
1347	5689530	Data recovery circuit with large retime margin
1348	5687203	Digital phase locked loop circuit
1349	5686849	Circuit for clock signal extraction from a high speed data stream
1350	5684841	Clocking converter for asynchronous data
1351	5684838	Receiving device for sampling data bits at a preferred time
1352	5684805	Microwave multiphase detector
1353	5675584	High speed serial link for fully duplexed data communication
1354	5671258	Clock recovery circuit and receiver using same
1355	5671257	Symbol timing recovery based on complex sample magnitude
1356	5671253	Apparatus for demodulating and decoding video signals encoded in different formats
1357	5670913	Phase locked loop circuit with false locking detector and a lock acquisition sweep
1358	5668831	Signal processing apparatus and method
1359	5668830	Digital phase alignment and integrated multichannel transceiver employing same
1360	5666388	Clock recovery circuit with matched oscillators
1361	5666387	Signal processing device having PLL circuits
1362	5666386	Digital demodulating apparatus capable of selecting proper sampling clock for data transmission speed
1363	5663666	Digital phase detector
1364	5661765	Receiver and transmitter-receiver
1365	5657318	Phase-comparison bit synchronizing circuit
1366	5654989	Method and apparatus for symbol timing tracking
1367	5654987	Clock recovery circuit with reduced jitter
1368	5654695	Multi-function network
1369	5652773	Digital phase-locked loop for data separation
1370	5652769	Costas loop and data identification apparatus
1371	5652767	Data decision circuit used in optical parallel receiving module, optical parallel receiving module, optical parallel transmission system and terminal structure of optical transmission fiber
1372	5652669	Optical synchronization arrangement
1373	5652541	Data demodulator employing decision feedback for reference parameter recovery and method used therin
1374	5652531	Phase detector which eliminates frequency ripple
1375	5651033	Inter-system data communication channel comprised of parallel electrical conductors that simulates the performance of a bit serial optical communications link
1376	5651031	Clock recovery circuit of demodulator
1377	5648994	Digital phase-locked loop
1378	5648993	Method and apparatus for synchronizing modem transmission by controlling a measured phase difference between an internal timing signal and a transmission timing signal
1379	5648991	Sampling phase synchronizing apparatus and bidirectional maximum likelihood sequence estimation scheme therefore
1380	5648964	Master-slave multiplex communication system and PLL circuit applied to the system
1381	5646955	Apparatus for measuring cycle to cycle jitter of a digital signal and method therefor
1382	5646562	Phase synchronization circuit, one-shot pulse generating circuit and signal processing system
1383	5644600	Multi-valued signal decoding circuit having bit synchronization signal timing transition which is sampled and held
1384	5642387	Bit synchronization method and circuit
1385	5642386	Data sampling circuit for a burst mode communication system
1386	5642243	Timing recovery frequency error detector for sampled amplitude magnetic recording
1387	5640523	Method and apparatus for a pulsed tri-state phase detector for reduced jitter clock recovery
1388	5640426	Clock recovery circuit of demodulator
1389	5638410	Method and system for aligning the phase of high speed clocks in telecommunications systems
1390	5636249	Method of and apparatus for phase synchronization with an RDS signal
1391	5635864	Comparator circuit
1392	5633899	Phase locked loop for high speed data capture of a serial data stream
1393	5633766	Magnetic disk storage apparatus with phase sync circuit having controllable response characteristics
1394	5631590	Synchronized clock signal regenerating circuit
1395	5626625	Method and apparatus for measuring the period of response of an implantable medical device based upon the difference in phase between a trigger signal and an internal clock signal
1396	5625652	Timing recovery controller and method for adjusting the timing of synchronizing windows in a PSK demodulator
1397	5625649	Clock recovery circuit of demodulator
1398	5621774	Method and apparatus for synchronizing parallel data transfer
1399	5621755	CMOS technology high speed digital signal transceiver
1400	5619686	Source synchronized data transmission circuit
1401	5619171	Phase-locked loop, phase comparator for use in the phase-locked loop, and reproducing device including the phase-locked loop
1402	5617452	Bit synchronizer
1403	5617374	Signal detection device and clock recovery device using the same
1404	5612980	Method and apparatus for fast lock time
1405	5610954	Clock reproduction circuit and elements used in the same
1406	5610953	Asynchronous low latency data recovery apparatus and method
1407	5610952	Synchronization signal generating device
1408	5610949	Phase detector and a method determining the phase of received PSK symbols
1409	5608357	High speed phase aligner with jitter removal
1410	5604768	Frequency synchronized bidirectional radio system
1411	5604741	Ethernet system
1412	5604541	High definition television receiver
1413	5602882	Digital jitter attenuator using selection of multi-phase clocks and auto-centering elastic buffer
1414	5600682	Asynchronous data transmitting and receiving system
1415	5598448	Method and apparatus for controlling a digital phase lock loop and within a cordless telephone
1416	5598446	Clock extraction of a clock signal using rising and falling edges of a received transmission signal
1417	5598443	Method and apparatus for separating data and clock from a digital data stream
1418	5598442	Self-timed parallel inter-system data communication channel
1419	5598414	Access to transmit on a message priority basis
1420	5598156	Serial to parallel conversion with phase locked loop
1421	5596614	Method and circuitry for aligning the phase of high-speed clocks in telecommunications systems
1422	5596610	Delay stage circuitry for a ring oscillator
1423	5596603	Device for wireless transmission of digital data, in particular of audio data, by infrared light in headphones
1424	5594763	Fast synchronizing digital phase-locked loop for recovering clock information from encoded data
1425	5594762	Apparatus for retiming digital data transmitted at a high speed
1426	5594758	Frequency controller and method of correcting phase estimates in a PSK demodulator using frequency control
1427	5592519	Dual frequency clock recovery using common multitap line
1428	5592515	Fully digital data separator and frequency multiplier
1429	5592125	Modified bang-bang phase detector with ternary output
1996
1430	5590157	Data terminal comprising a demodulator for a FSK phase-coherent modulated signal
1431	5587709	High speed serial link for fully duplexed data communication
1432	5586150	Method and apparatus for symbol synchronization in multi-level digital FM radio
1433	5586149	Interference dependent adaptive phase clock controller
1434	5581585	Phase-locked loop timing recovery circuit
1435	5581579	Method and apparatus to adaptively control the frequency of reception in a digital wireless communication system
1436	5579353	Dynamic clock mode switch
1437	5579352	Simplified window de-skewing in a serial data receiver
1438	5579351	Jitter suppression circuit
1439	5579321	Telecommunication system and a main station and a substation for use in such a system
1440	5577078	Edge detector
1441	5577075	Distributed clocking system
1442	5577074	Combined clock recovery/frequency stabilization loop
1443	5577044	Enhanced serial data bus protocol for audio data transmission and reception
1444	5576904	Timing gradient smoothing circuit in a synchronous read channel
1445	5574756	Method for generating digital communication system clock signals & circuitry for performing that method
1446	5568526	Self timed interface
1447	5566215	Method and device for restoring a clock signal punctuating the transmission of received signals
1448	5566204	Fast acquisition clock recovery system
1449	5559998	Clock synchronous serial information receiving apparatus receiving reliable information even when noise is present
1450	5559841	Digital phase detector
1451	5557648	Phase lock loop circuit using a sample and hold switch circuit
1452	5557647	Baseband signal demodulator
1453	5553104	Information recording/reproducing apparatus having a clock timing extraction circuit for extracting a clock signal from an input data signal
1454	5553103	Circuit including a subtractor, an adder, and first and second clocked registers connected in series
1455	5553100	Fully digital data separator and frequency multiplier
1456	5552942	Zero phase start optimization using mean squared error in a PRML recording channel
1457	5552726	High resolution digital phase locked loop with automatic recovery logic
1458	5550878	Phase comparator
1459	5550869	Demodulator for consumer uses
1460	5550860	Digital phase alignment and integrated multichannel transceiver employing same
1461	5550820	Multiple protocol personal communications network system
1462	5546032	Clock signal regeneration method and apparatus
1463	5544200	Acquisition of carrier phase and symbol timing through joint estimation of phase and timing adjustments
1464	5544164	Method and cell based wide area network alternative access telephone and data system
1465	5541967	Fast symbol synchronization for use in conditioning a receiving modem
1466	5541958	Clock recovery circuit of demodulator
1467	5541556	Clock recovery circuit for serial digital video
1468	5539786	Digital circuit for generating a clock signal
1469	5539784	Refined timing recovery circuit
1470	5539344	Phase-locked circuit and interated circuit device
1471	5537442	Instantaneous phase detecting circuit and clock recovery signal generating circuit incorporated in differential demodulator
1472	5535252	Clock synchronization circuit and clock synchronizing method in baseband demodulator of digital modulation type
1473	5535249	Precise detection of frequency error for bursts modulated by predetermined symbol sequence
1474	5534805	Synchronized clock generating apparatus
1475	5533072	Digital phase alignment and integrated multichannel transceiver employing same
1476	5533069	Method and apparatus for digital frequency compensation of carrier drift in a PSK demodulator
1477	5533066	Apparatus and method for estimating maximum likelihood sequence using optimum sampling phase
1478	5532632	Method and circuit for synchronizing an input data stream with a sample clock
1479	5532556	Multiplexed digital audio and control/status serial protocol
1480	5528637	Synchronizing circuit
1481	5528636	Data synchronization device
1482	5528198	Clock signal extraction apparatus using VCO having plurality of selectable phase shifted outputs
1483	5528183	Serial clock synchronization circuit
1484	5526380	First-order loop control configuration for a phase-rotator based clock synchronization circuit
1485	5526379	Method of selecting the most desirable code search mode in a pager in the case of frame async
1486	5526361	Bit demultiplexor for demultiplexing a serial data stream
1487	5525935	High-speed bit synchronizer with multi-stage control structure
1488	5524127	Unique word detector and method for detecting a unique word within one of several windows offset in time
1489	5522866	Method and apparatus for improving the resolution of pulse position modulated communications between an implantable medical device and an external medical device
1490	5521939	Timing reproduction device
1491	5521499	Signal controlled phase shifter
1492	5519737	Adapter for the connection to a clear-channel telecommunication network
1493	5517521	Method and apparatus for synchronization between real-time sampled audio applications operating full-duplex over a half-duplex radio link
1494	5513184	Wireless communication system
1495	5512860	Clock recovery phase locked loop control using clock difference detection and forced low frequency startup
1496	5509037	Data phase alignment circuitry
1497	5508835	Master clock distributing method and apparatus using same
1498	5506875	Method and apparatus for performing frequency acquisition in all digital phase lock loop
1499	5506577	Synchronizer for pulse code modulation telemetry
1500	5504751	Method and apparatus for extracting digital information from an asynchronous data stream
1501	5502750	Digital jitter attenuator using selection of multi-phase clocks and auto-centering elastic buffer for a token ring network
1502	5500757	Optical receiving system
1503	5500620	Timing recovery for digital demodulation
1504	5497261	Synchronization apparatus for an optical communications network
1505	5491729	Digital phase-locked data recovery circuit
1506	5491726	Method and apparatus to determine the frequency and time slot position in a digital wireless communication session
1507	5491713	Minimized oversampling Manchester decoder
1508	5491438	Synchronized clock generating apparatus
1509	5488641	Digital phase-locked loop circuit
1510	5488639	Parallel multistage synchronization method and apparatus
1511	5488636	Digital data detector
1512	5487095	Edge detector
1513	5487070	Apparatus for reproducing received data
1514	5485490	Method and circuitry for clock synchronization
1515	5485484	Digitally implemented phase and lock indicators for a bit synchronizer
1516	5485113	Jitter-compensated sampling phase control apparatus
1517	5483180	Data and clock recovery circuit
1518	5481573	Synchronous clock distribution system
1995
1519	5479456	Automatic false synchronization correction mechanism for biphase-modulated signal reception
1520	5479455	Clock synchronous serial information transfer apparatus
1521	5477177	Phase error processor circuit with a comparator input swapping technique
1522	5475715	Sync data introduction method and system
1523	5473639	Clock recovery apparatus with means for sensing an out of lock condition
1524	5473636	Data discriminating circuit and an optical receiver using the same
1525	5473610	Method of clock signal recovery and of synchronization for the reception of information elements transmitted by an ATM network and device for the implementation of the method
1526	5471502	Bit clock regeneration circuit for PCM data, implementable on integrated circuit
1527	5471176	Glitchless frequency-adjustable ring oscillator
1528	5469466	System for highly repeatable clock parameter recovery from data modulated signals
1529	5467464	Adaptive clock skew and duty cycle compensation for a serial data bus
1530	5465059	Method and apparatus for timing acquisition of partial response class IV signaling
1531	5463664	DQPSK delay detection circuit that produces stable clock signal in response to both I and Q signals
1532	5463655	Single-ended pulse gating circuit
1533	5463627	Frame synchronizing apparatus for quadrature modulation data communication radio receiver
1534	5463351	Nested digital phase lock loop
1535	5459765	Phase comparator for biphase coded signal including preamble with code violation
1536	5459756	Sampling phase detector arrangement
1537	5459753	Method and apparatus for pattern independent phase detection and timing recovery
1538	5459751	Demodulation circuit of communication control system
1539	5459727	Wireless telecommunication system
1540	5457719	All digital on-the-fly time delay calibrator
1541	5457718	Compact phase recovery scheme using digital circuits
1542	5455847	Clock recovery phase detector
1543	5455540	Modified bang-bang phase detector with ternary output
1544	5454015	Adaptive timing recovery with gain adjustment
1545	5452326	Digital PLL circuit with low power consumption
1546	5452324	Packet data recovery system
1547	5451894	Digital full range rotating phase shifter
1548	5450450	Asynchronous data transmitting and receiving system
1549	5448598	Analog PLL clock recovery circuit and a LAN transceiver employing the same
1550	5448201	Clock recovery circuit in .pi./4 shift quadriphase PSK demodulator
1551	5446766	Digital communication systems
1552	5442658	Synchronization apparatus for a synchronous data processing system
1553	5440594	Method and apparatus for joint optimization of transmitted pulse shape and receiver timing in digital systems
1554	5440267	Demodulator
1555	5438595	Method of estimating the speed of a mobile unit in a digital wireless communication system
1556	5438300	Digital frequency multiplier utilizing digital controlled oscillator
1557	5436942	Method of equalizing digitally encoded signals transmitted in a plurality of non-contiguous time slots
1558	5436937	Multi-mode digital phase lock loop
1559	5436936	Compensation of a clock operating error
1560	5436853	Remote control signal processing circuit for a microcomputer
1561	5432827	Clock extraction circuit for fiber optic receivers
1562	5432825	Enabling code for radiotransmission of data
1563	5432791	Device for synchronizing system clock using detected synchromization signal
1564	5432481	Phase-locked loop circuit
1565	5432480	Phase alignment methods and apparatus
1566	5430773	Data sampling apparatus, and resultant digital data transmission system
1567	5430772	Bit synchronizer for NRZ data
1568	5430771	Method of and apparatus for detecting the presence of data in a received signal by monitoring the spread of values to synchronize receiver
1569	5425057	Phase demodulation method and apparatus using asynchronous sampling pulses
1570	5424882	Signal processor for discriminating recording data
1571	5422918	Clock phase detecting system for detecting the phase difference between two clock phases regardless of which of the two clock phases leads the other
1572	5420895	Phase compensating circuit
1573	5420893	Asynchronous data channel for information storage subsystem
1574	5418822	Configuration for clock recovery
1575	5418526	Slave bus controller circuit for class A motor vehicle data communications
1576	5418496	Serial data clock recovery circuit using dual oscillator circuit
1577	5416806	Timing loop method and apparatus for PRML data detection
1578	5414832	Tunable synchronous electronic communication apparatus
1579	5414739	Transmission system constituted of multistage reproduction nodes
1580	5412698	Adaptive data separator
1581	5410570	Self synchronizing automatic correlator
1582	5410557	Method and apparatus for recognizing valid components in a digital signal
1583	5410263	Delay line loop for on-chip clock synthesis with zero skew and 50% duty cycle
1584	5406427	Clock generator for magnetic disk drive that switches between preamble and data portions
1585	5404250	Magnetic disk storage apparatus with phase sync circuit having controllable response characteristic
1586	5400370	All digital high speed algorithmic data recovery method and apparatus using locally generated compensated broad band time rulers and data edge position averaging
1587	5400368	Method and apparatus for adjusting the sampling phase of a digitally encoded signal in a wireless communication system
1588	5400367	Apparatus and method for synchronizing an input data stream with bit or phase synchronization
1589	5400364	Decision-directed digital phase locked loop
1590	5399995	CMOS circuit providing 90 degree phase delay
1591	5398263	Autonomous pulse train timing controls for time-mark alignment
1592	5398007	Low-power baud rate generator including two oscillators
1593	5396523	Shifting the phase of a clock signal, in particular for clock recovery of a digital data signal
1594	5396522	Method and apparatus for clock synchronization with information received by a radio receiver
1595	5396109	Bit clock regenerating circuit and data regenerating method
1596	5394437	High-speed modem synchronized to a remote CODEC
1597	5384806	Modem with time-invariant echo path
1598	5379325	Clock generating apparatus, data transmitting/receiving apparatus and data transmitting/receiving method
1994
1599	5377233	Seam-less data recovery
1600	5377232	Frequency synchronized bidirectional radio system
1601	5376894	Phase estimation and synchronization using a PSK demodulator
1602	5373534	Serial data receiving apparatus
1603	5371766	Clock extraction and data regeneration logic for multiple speed data communications systems
1604	5367542	Digital data recovery using delay time rulers
1605	5367538	Apparatus and method for direct phase digitizing
1606	5365547	1X asynchronous data sampling clock for plus minus topology applications
1607	5363438	Selective ringing receiving device and method
1608	5363414	Method for detecting a signal sequence
1609	5359631	Timing recovery circuit for synchronous waveform sampling
1610	5359630	Method and apparatus for realignment of synchronous data
1611	5355392	Digital data detector for reducing errors due to frequency variations
1612	5355092	Relatively simple QPSK demodulator, that uses substantially all digital circuitry and an internally generated symbol clock, and circuitry for use therein
1613	5353271	Method and apparatus for recording or reproducing information on or from recording medium
1614	5349610	Digital data detecting and synchronizing circuit
1615	5341405	Data recovery apparatus and methods
1616	5341404	Synchronizing circuit and method
1617	5333150	Demodulation and synchronization method and system for digitally modulated signals
1618	5329393	Optical Nyquist rate multiplexer and demultiplexer
1619	5329251	Multiple biasing phase-lock-loops controlling center frequency of phase-lock-loop clock recovery circuit
1620	5327581	Method and apparatus for maintaining synchronization in a simulcast system
1621	5327466	1X asynchronous data sampling clock
1622	5325093	Analog-to-digital converter for composite video signals
1623	5319680	Phase locked loop synchronization system for use in data communications
1624	5319679	Method and apparatus for recovering data from a radio signal
1625	5319321	Digital PLL circuit
1626	5317602	Base-band delayed detector with synchronizing circuit
1627	5317202	Delay line loop for 1X on-chip clock generation with zero skew and 50% duty cycle
1628	5315622	Data circuit terminating equipment (DCE) including timing arrangements circuits controlled by processing means
1629	5315299	Multiplex data communicating apparatus applicable to automotive vehicle
1630	5313503	Programmable high speed digital phase locked loop
1631	5313501	Method and apparatus for deskewing digital data
1632	5313499	Constant gain phase lock-loop
1633	5313496	Digital demodulator circuit
1634	5311516	Paging system using message fragmentation to redistribute traffic
1635	5311376	Information detecting system
1636	5311178	Method for processing sample values in an RLL channel
1637	5309483	Data recovery device
1638	5309035	Method and apparatus for clock skew reduction through absolute delay regulation
1639	5303262	Method and apparatus for triggering measurements from a TDMA signal
1640	5301196	Half-speed clock recovery and demultiplexer circuit
1641	5299237	Asymmetrical data tracking digital phase locked loop
1642	5299235	Time synchronization of a receiver in a digital radio telephone system
1643	5297869	Apparatus and method for synchronizing a digital data clock in a receiver with a digital data clock in a transmitter
1644	5297181	Method and apparatus for providing a digital audio interface protocol
1645	5297173	Phase/frequency comparator for timing recovering circuit
1646	5297172	Method and apparatus for clock recovery for digitally implemented modem
1647	5297169	Equalizer training in a radiotelephone system
1648	5297164	Digital communications systems
1649	5295155	Multi-level digital data regeneration system
1650	5294844	Sampling signal generation circuit
1651	5294842	Update synchronizer
1652	5289508	Clock information transmitting device and clock information receiving device
1653	5287359	Synchronous decoder for self-clocking signals
1654	5282223	Digital transmission control equipment
1655	5282205	Data communication terminal providing variable length message carry-on and method therefor
1656	5280539	Synchronous circuit for serial input signal
1657	5278873	Broadband digital phase aligner
1658	5276716	Bi-phase decoder phase-lock loop in CMOS
1659	5276713	Method of frame synchronization for digital mobile radio communication
1660	5276712	Method and apparatus for clock recovery in digital communication systems
1993
1661	5274676	Multi-standard synchronizing signal recovery system
1662	5272729	Clock signal latency elimination network
1663	5272390	Method and apparatus for clock skew reduction through absolute delay regulation
1664	5270713	Decode circuit capable of decreasing the amount of hardware required by selectively using one of a plurality of clock signals
1665	5268937	Method and system for digital transmission of serial data
1666	5268931	Data communication system
1667	5268653	Digital phase-locked loop operating mode control method and device
1668	5268652	Circuit for detecting locking of a digital phase locked loop
1669	5267267	Timing extraction method and communication system
1670	5266850	Clock delay trim adjustment with stopping feature for eliminating differential delay between clock signal and analog signal
1671	5263045	Spread spectrum conference call system and method
1672	5260841	Clock extracting circuit
1673	5259005	Apparatus for and method of synchronizing a clock signal
1674	5259004	Frame synchronization dependent type bit synchronization extraction circuit
1675	5258725	Phase lock loop with compensation for voltage or temperature changes in a phase comparator
1676	5257293	Phase locked loop for extracting clock pulses through wave differential method
1677	5255292	Method and apparatus for modifying a decision-directed clock recovery system
1678	5255290	Method and apparatus for combined frequency offset and timing offset estimation
1679	5255289	Symbol timing recovery circuit
1680	5253273	ISDN "S" signal detection and display apparatus
1681	5251238	Circuit arrangement and method for the regeneration and synchronization of a digital signal
1682	5250913	Variable pulse width phase detector
1683	5248969	Phase comparing and CMI/NRZ decoding apparatus
1684	5247544	Phase adjustment method and apparatus for use in a clock recovery circuit
1685	5245637	Phase and frequency adjustable digital phase lock logic system
1686	5245632	Synchronous FSK detection
1687	5243630	Method of and arrangement for generating a clock signal from a biphase modulated digital signal
1688	5239561	Phase error processor
1689	5237590	Timing extraction circuit and communication system utilizing the same
1690	5237290	Method and apparatus for clock recovery
1691	5235596	Circuit arrangement for generating synchronization signals in a transmission of data
1692	5233636	Analog and digital phase detector for bit synchronism
1693	5231650	Digital signal reproducing apparatus
1694	5228064	Data timing recovery apparatus and method
1695	5228035	Synchronizing system in digital communication line
1696	5227783	Telemetry apparatus and method with digital to analog converter internally integrated within C.P.U.
1697	5227777	Radio paging receiver for intermittently receiving a paging signal transmitted on different phases of a clock
1698	5224130	Signal detection apparatus
1699	5222107	Transmission and reception synchronization device for a communication network station particularly for automotive vehicles
1700	5222105	Opto-electronic interface for decoding wave division multiplexed manchester gray coded binary signals
1701	5220585	Serial clock generating circuit
1702	5220581	Digital data link performance monitor
1703	5220448	Bit and frame synchronization unit for an access node of optical transmission equipment
1704	5218437	Signal separator for separating teletext bit sequences from a broadcast television signal
1705	5216554	Digital phase error estimator
1706	5214676	Digital phase detector arrangements
1707	5212716	Data edge phase sorting circuits
1708	5212714	High speed data interface for land mobile communication system
1709	5208839	Symbol synchronizer for sampled signals
1710	5208833	Multi-level symbol synchronizer
1711	5204879	High Speed data detection and clock recovery in a received multi-level data signal
1712	5200981	Fine timing recovery for QAM modem receiver
1713	5200976	Synchronizing system
1714	5198758	Method and apparatus for complete functional testing of a complex signal path of a semiconductor chip
1715	5197086	High speed digital clock synchronizer
1716	5195110	Clock recovery and decoder circuit for a CMI-encoded signal
1717	5189378	Tone signal detecting circuit
1718	5185768	Digital integrating clock extractor
1719	5182761	Data transmission system receiver having phase-independent bandwidth control
1720	5181227	Receiver having a signal detector and bit synchronizer
1721	5179572	Spread spectrum conference calling system and method
1992
1722	5175544	Digitally controlled bit synchronizer
1723	5173663	Demodulation circuit enabling independent recovery of the carrier and sampling timing
1724	5173617	Digital phase lock clock generator without local oscillator
1725	5172397	Single channel serial data receiver
1726	5172395	Method of and apparatus for deriving an indication of noise content of data bits
1727	5170396	Data valid detector circuit for Manchester encoded data
1728	5170297	Current averaging data separator
1729	5168511	Manchester data recorder with synchronously adjustable clock
1730	5164966	NRZ clock and data recovery system employing phase lock loop
1731	5164965	Method and apparatus for synchronizing a receiver to a received signal
1732	5163071	Method and arrangement for bit synchronization in a receiver for digital data transmission
1733	5163067	Method and apparatus for decoding Manchester encoded data
1734	5162746	Digitally controlled crystal-based jitter attenuator
1735	5161175	Circuit and method of detecting an invalid clock signal
1736	5161173	Method of adjusting the phase of a clock generator with respect to a data signal
1737	5159291	Digitally controlled timing recovery loop with low intrinsic jitter and high jitter tolerance
1738	5151927	Dual-mode synchronization device, in particular for frame clock phase recovery in a half-duplex transmission system
1739	5148450	Digital phase-locked loop
1740	5148430	Transmitter/receiver for generating transmitting data signal in synchronization with received data signal
1741	5148113	Clock phase alignment
1742	5146478	Method and apparatus for receiving a binary digital signal
1743	5140702	Time based signal detector for operating in a presence search mode and absence search mode during peak times and off peak times
1744	5140620	Method and apparatus for recovering data, such as teletext data encoded into television signals
1745	5138635	Network clock synchronization
1746	5138633	Method and apparatus for adaptively retiming and regenerating digital pulse signals
1747	5134637	Clock recovery enhancement circuit
1748	5128970	Non-return to zero synchronizer
1749	5127026	Circuit and method for extracting clock signal from a serial data stream
1750	5126692	Variable frequency system having linear combination of charge pump and voltage controlled oscillator
1751	5126587	Synchronization circuit configuration
1752	5124669	One-shot circuit for use in a PLL clock recovery circuit
1753	5122679	Integrated logic circuit with clock skew adjusters
1754	5121411	Multi-edge clock recovery method
1755	5117500	Multi system decoding receiver
1756	5117195	Data referenced demodulation of multiphase modulated data
1757	5117135	Frequency and phase detection circuit in NRZ bit synchronous system
1758	5115208	PLL clock signal regenerator using a phase correlator
1759	5113415	Detection of a particular signal sequence with no adverse influence of multipath transmission
1760	5111486	Bit synchronizer
1761	5111152	Apparatus and method for demodulating a digital modulation signal
1762	5109394	All digital phase locked loop
1763	5105447	Demodulated data recognition and decision device
1764	5103466	CMOS digital clock and data recovery circuit
1765	5103465	Symbol synchronization circuit
1766	5103464	Method and apparatus for timing recovery in digital data communications systems
1767	5103185	Clock jitter suppressing circuit
1768	5099501	Arrangement for switching a clock to a clock having the same frequency but a lagging clock phase
1769	5097489	Method for incorporating window strobe in a data synchronizer
1770	5093841	Clock acquisition in a spread spectrum system
1771	5090025	Token ring synchronization
1772	5087828	Timing circuit for single line serial data
1773	5081655	Digital phase aligner and method for its operation
1774	5079512	Quadrature demodulation of a data sequence following a particular signal sequence with a local reference carrier signal having a frequency different from a received carrier signal
1991
1775	5077758	Signal detector and bit synchronizer
1776	5077529	Wide bandwidth digital phase locked loop with reduced low frequency intrinsic jitter
1777	5073905	Apparatus for and method of synchronizing a local oscillator to a received digital bit stream
1778	5068628	Digitally controlled timing recovery loop
1779	5067138	Phase-locked-loop circuit and bit-detection arrangement comprising such a phase-locked-loop circuit
1780	5065412	Process and circuit arrangement for digital control of the phase of scanning clock pulses
1781	5060239	Transfer strobe time delay selector and method for performing same
1782	5059925	Method and apparatus for transparently switching clock sources
1783	5058142	Clock extracting circuit in digital-line signal receiver
1784	5056121	Circuit for obtaining accurate timing information from received signal
1785	5056118	Method and apparatus for clock and data recovery with high jitter tolerance
1786	5056114	Method and apparatus for decoding Manchester encoded data
1787	5056054	Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator
1788	5054038	Method and apparatus for restoring data
1789	5053649	Method and apparatus for high speed phase detection
1790	5052026	Bit synchronizer for short duration burst communications
1791	5052022	Repeater and PLL circuit
1792	5051990	Phase adjustment circuit
1793	5050194	High speed asynchronous data interface
1794	5050193	Device for synchronizing a clock in relation to an incident digital signal, in particular at high transmission rates
1795	5048060	Digital signal receiving circuit with means for controlling a baud rate sampling phase by a power of sampled signals
1796	5046075	Method and arrangement for adapting a clock to a plesiochronous data signal and for clocking the data signal with the adapted clock
1797	5046073	Signal processing apparatus for recovering a clock signal and a data signal from an encoded information signal
1798	5042054	Method for generating a data receiving clock of paging receiver
1799	5040194	Method and apparatus for providing for automatic gain control of incoming signals in a modem
1800	5040193	Receiver and digital phase-locked loop for burst mode data recovery
1801	5038351	Coded mark inversion block synchronization circuit
1802	5036529	Digital auto-phase-controlled retiming circuit
1803	5036298	Clock recovery circuit without jitter peaking
1804	5036297	High-speed digital PLL device
1805	5036230	CMOS clock-phase synthesizer
1806	5034967	Metastable-free digital synchronizer with low phase error
1807	5027085	Phase detector for phase-locked loop clock recovery system
1808	5025461	Method of and circuit arrangement for recovering a bit clock from a received digital communication signal
1809	5022058	Timing signal recovery circuit for a data transmission system
1810	5022057	Bit synchronization circuit
1811	5022056	Method and structure for digital phase synchronization
1812	5018169	High resolution sample clock generator with deglitcher
1813	5018142	Technique for organizing and coding serial binary data from a plurality of data lines for transmission over a single transmission line
1814	5017801	Method and apparatus for converting a gap-infested read-in clock into a gap-free read-out clock
1815	5016005	Telemetry apparatus and method
1816	5015970	Clock recovery phase lock loop having digitally range limited operating window
1817	5014270	Device for synchronizing a pseudo-binary signal with a regenerated clock signal having phase jumps
1818	5012494	Method and apparatus for clock recovery and data retiming for random NRZ data
1819	5012491	Preamable detection circuit for digital communications system
1820	5012198	Digital PLL circuit having reduced lead-in time
1821	5008904	Synchronizer using clock phase extrapolation
1822	5003562	Digital phase lock loop decoder
1823	5003561	Process for the reception of a binary digital signal
1824	5003557	Apparatus for receiving digital signal
1825	5003308	Serial data receiver with phase shift detection
1826	4999526	Apparatus for synchronizing clock signals
1827	4998264	Method and apparatus for recovering data, such as teletext data encoded into television signals
1828	4992790	Digital phase-locked loop biphase demodulating method and apparatus
1829	4991975	Division multiplexing and demultiplexing means lightwave communication system comprising optical time
1830	4989223	Serial clock generating circuit
1831	4989221	Sample rate converter
1832	4984255	Edge transition insensitive delay line system and method
1833	4984249	Method and apparatus for synchronizing digital data symbols
1834	4983975	A/D converter
1990
1835	4977582	Synchronization of non-continuous digital bit streams
1836	4975930	Digital phase locked loop
1837	4975929	Clock recovery apparatus
1838	4975913	Programmable multiplexing/demultiplexing system
1839	4972444	Digital phase-locked device and method
1840	4972443	Method and arrangement for generating a correction signal for a digital clock recovery means
1841	4972442	Phase-locked loop clock
1842	4972161	Clock recovery for serial data communications system
1843	4970609	Clocking method and apparatus for use with partial response coded binary data
1844	4969163	Timing control for Modem receivers
1845	4965884	Data alignment method and apparatus
1846	4964117	Timing synchronizing circuit for baseband data signals
1847	4961206	Data modem system
1848	4959846	Clock recovery apparatus including a clock frequency adjuster
1849	4955040	Method and apparatus for generating a correction signal in a digital clock recovery device
1850	4953185	Clock recovery and hold circuit for digital TDM mobile radio
1851	4953163	TDM transmission system
1852	4952883	Phase detector circuit for periodic signal using three sampling data
1853	4949360	Synchronizing circuit
1854	4949051	Phase lock clock recovery with aided frequency aquisition
1855	4943788	Broad band VCO control system for clock recovery
1856	4942590	Optimum clock generator in data communication
1857	4941151	Predictive clock recovery circuit
1858	4940948	Clock driven data sampling circuit
1859	4933959	Tracking bit synchronizer
1860	4933782	Digital phase lock device
1861	4932041	Circuit for obtaining a bit-rate clock signal from a serial digital data signal
1862	4926447	Phase locked loop for clock extraction in gigabit rate data communication links
1863	4926445	External asynchronous input tester for bit slice machines
1864	4918709	Data demodulator baud clock phase locking
1865	4918406	Timing recovery scheme for burst communication systems having a VCO with injection locking circuitry
1866	4912730	High speed reception of encoded data utilizing dual phase resynchronizing clock recovery
1867	4912729	Phase-locked-loop circuit and bit detection arrangement comprising such a phase-locked-loop circuit
1868	4912726	Decision timing control circuit
1869	4910755	Regenerator/synchronizer method and apparatus for missing-clock timing messages
1870	4910474	Method and apparatus for generating phase and amplitude modulated signals
1871	4908842	Flash synchronized gated sample clock generator
1872	4908841	Data decoding circuit including phase-locked loop timing
1873	4896336	Differential phase-shift keying demodulator
1874	4891598	Variable bit rate clock recovery circuit
1989
1875	4890305	Dual-tracking phase-locked loop
1876	4888791	Clock decoder and data bit transition detector for fiber optic work station
1877	4888790	Timing recovery system using bipolar-pattern center estimator
1878	4888729	Digitally controlled oscillator apparatus
1879	4882546	Demodulation clock generator circuit
1880	4881243	Signal timing circuits
1881	4881059	Manchester code receiver
1882	4876700	Data demodulator
1883	4876699	High speed sampled data digital phase detector apparatus
1884	4872185	Signal transmission method
1885	4871979	Variable frequency system having linear combination of charge pump and voltage controlled oscillator
1886	4868864	Autocorrelating 2400 bps handshake sequence detector
1887	4868854	Establishment of bit synchronization in a data transmitting/receiving system
1888	4868514	Apparatus and method for digital compensation of oscillator drift
1889	4868513	Phase-locked loop with redundant reference input
1890	4866739	Digital fast recovery timing algorithm
1891	4866737	High speed voiceband data transmission and reception
1892	4862482	Receiver for Manchester encoded data
1893	4855735	Recovery of data clock signals
1894	4853841	Arrangement for the individual adaptation of a serial interface of a data processing system to a data transmission speed of a communication partner
1895	4852124	Digital phase-locked loop clock extractor for bipolar signals
1896	4849998	Rate synchronized symbol timing recovery for variable rate data transmission systems
1897	4849997	Timing signal regenerator for phase-adjusting a reception timing signal with a transmission timing signal given a predetermined frequency
1898	4849704	Duty cycle independent phase detector
1899	4849703	Method and apparatus for generating a data sampling clock locked to a baud clock contained in a data signal
1900	4847876	Timing recovery scheme for burst communication systems
1901	4847875	Timing circuit including jitter compensation
1902	4847874	Clock recovery system for digital data
1903	4847870	High resolution digital phase-lock loop circuit
1904	4843617	Apparatus and method for synchronizing a communication system
1905	4841551	High speed data-clock synchronization processor
1906	4841548	Method and apparatus for extracting an auxiliary data clock from the clock and/or the clock-phase of a synchronous or plesiochronic digital signal
1907	4841167	Clock recovering device
1908	4839907	Clock skew correction arrangement
1909	4837782	CMI decoder
1910	4837781	Phase locked loop clock synchronizer and signal detector
1911	4837779	Communicator and communication method and system
1912	4833397	Tester for verification of pulse widths in a digital system
1913	4831338	Synchronizing clock signal generator
1914	4829544	Bit synchronization circuit
1915	4829466	Paging device with modifiable operational characteristics
1916	4825437	Clock recovery arrangement especially for an information transmission system using the TDMA principle in one transmission direction
1917	4825113	Single transmission line bidirectional optical communication system
1918	4823363	Phase-locked clock regeneration circuit for digital transmission systems
1919	4823360	Binary data regenerator with adaptive threshold level
1920	4821297	Digital phase locked loop clock recovery scheme
1921	4821296	Digital phase aligner with outrigger sampling
1922	4820994	Phase regulating circuit
1923	4819251	High speed non-return-to-zero digital clock recovery apparatus
1924	4819080	Instrument for measuring the phase jitter of analog signals
1925	4817117	Method of and circuit arrangement for ensuring bit synchronization of a data block in a receiver
1926	4812906	Circuit arrangement for frequency division
1927	4809306	RF modem with improved clock recovery circuit
1928	4809304	Method of extracting a synchronous clock signal from a single- or double-density coded signal, and apparatus for performing the method
1929	4808937	Phase-locked loop for a modem
1930	4808884	High order digital phase-locked loop system
1931	4807257	Apparatus for the regeneration of channel-clock information in synchronous data transmission and data-recovery circuit arrangement comprising such apparatus
1932	4803705	Analog phase locked loop
1933	4803704	Circuit arrangement for the recognition of impermissable phase errors in a phase locked loop
1934	4803703	Apparatus and method for fine synchronization of a communication receiver
1935	4800340	Method and apparatus for generating a data recovery window
1936	4799241	Method and device for symbol synchronization and their application to the symbol demodulation of digital messages
1937	4797900	Modem with improved clock control and method therefor
1938	4796280	Digital data separator
1939	4796253	Time base converter employing two reference position phase lock loop
1988
1940	4794624	Method for clock synchronization of a signal receiver
1941	4792963	Satellite clock system
1942	4791628	High-speed demultiplexer circuit
1943	4789996	Center frequency high resolution digital phase-lock loop circuit
1944	4789984	High-speed multiplexer circuit
1945	4787096	Second-order carrier/symbol sychronizer
1946	4783791	Multiple reproducing repeater station system
1947	4780893	Bit synchronizer
1948	4780891	Method and device for synchronizing sychronous digital bit streams
1949	4780889	Device for relocking one or a number of identical or submultiple binary data signal trains on a synchronous reference clock signal
1950	4780681	Digital phase locked loop using fixed frequency oscillator and simulated time-shifting
1951	4775989	Timing phase detector circuit
1952	4775804	Reconstructed clock generator
1953	4773085	Phase and frequency detector circuits
1954	4773083	QPSK demodulator
1955	4771442	Electrical apparatus
1956	4768208	Mid-symbol sampling timing estimator
1957	4763342	Digital phase-locked loop circuits with storage of clock error signal
1958	4759040	Digital synchronizing circuit
1959	4756011	Digital phase aligner
1960	4756010	Asynchronous/synchronous data receiver circuit
1961	4752942	Method and circuitry for extracting clock signal from received biphase modulated signal
1962	4750193	Phase-locked data detector
1963	4748417	Method and circuit arrangement for switching a clock-controlled device having a plurality of operating statuses
1964	4744096	Clock recovery circuit
1965	4740998	Clock recovery circuit and method
1966	4737971	Synchronization detection circuit
1967	4737952	Time base converter employing two reference position phase lock loop
1968	4737722	Serial port synchronizer
1969	4734900	Restoring and clocking pulse width modulated data
1970	4733404	Apparatus and method for signal processing
1971	4730347	Method and apparatus for reducing jitter in a synchronous digital train for the purpose of recovering its bit rate
1972	4730267	Combination integrate and dump filter and level detector
1973	4720687	Frequency locked loop with constant loop gain and frequency difference detector therefor
1987
1974	4713830	Continuously variable synchronizer apparatus
1975	4713802	Digital signal reproducing circuit
1976	4713621	Phase synchronization circuit
1977	4709378	Arrangement for generating a clock signal
1978	4706033	Data recovery and clock circuit for use in data test equipment
1979	4704721	Real time network system
1980	4703479	Multi-direction time division multiplex communication apparatus
1981	4700357	Synchronizing stage for the acquisition of a synchronizing signal having low jitter from a biternary data sequence
1982	4700347	Digital phase adjustment
1983	4700241	Apparatus for recording and reproducing digital signals
1984	4700084	Digital clock recovery circuit apparatus
1985	4696016	Digital clock recovery circuit for return to zero data
1986	4695805	Apparatus for generating signals synchronized to an unstable external signal
1987	4694504	Synchronous, asynchronous, and data rate transparent fiber optic communications link
1988	4694472	Clock adjustment method and apparatus for synchronous data communications
1989	4694196	Clock recovery circuit
1990	4691327	Clock regenerator
1991	4686484	Phase detection circuit
1992	4680780	Clock recovery digital phase-locked loop
1993	4680779	Distributed clock synchronization in a digital data switching system
1994	4677648	Digital phase locked loop synchronizer
1995	4677614	Data communication system and method and communication controller and method therefor, having a data/clock synchronizer and method
1996	4675885	Digital circuit for extracting synchronism signals from a serial flow of coded data
1997	4675612	Apparatus for synchronization of a first signal with a second signal
1998	4675558	Lock detector for bit synchronizer
1999	4672639	Sampling clock pulse generator
2000	4672329	Clock generator for digital demodulators
2001	4670776	Chrominance signal processing system
2002	4669092	Arrangement for receiving digital data comprising an arrangement for adaptive timing recovery
2003	4669080	Synchronizing circuit in a plesiochronous digital signal multiplexer
2004	4668917	Phase comparator for use with a digital phase locked loop or other phase sensitive device
2005	4667333	Automatic clock recovery circuit
2006	4665535	Code regenerative system
2007	4663769	Clock acquisition indicator circuit for NRZ data
2008	4661965	Timing recovery circuit for manchester coded data
2009	4658217	Timing signal extracting circuit
2010	4653075	BPSK synchronizer using computational analysis
2011	4653074	Bit sync generator
2012	4651329	Digital decode logic for converting successive binary zero pulses having opposite polarity to a stream of data pulses
2013	4651026	Clock recovery circuit
2014	4644567	Circuit arrangement for synchronizing of clock-signal generated at a receiving station with clock-signals received in telecommunications systems with digital transmission of information
2015	4641323	Multi-phase PSK demodulator
2016	4637006	Apparatus for producing digital information from a transmission medium
2017	4635280	Bit synchronizer for decoding data
2018	4635277	Digital clock recovery circuit apparatus
1986
2019	4633488	Phase-locked loop for MFM data recording
2020	4633487	Automatic phasing apparatus for synchronizing digital data and timing signals
2021	4631488	QAM demodulator with distortion compensation
2022	4628519	Digital phase-locked loop circuit
2023	4628282	Clock generator for digital demodulators
2024	4623805	Automatic signal delay adjustment apparatus
2025	4620159	Demodulator for multiphase PSK or multilevel QAM signals
2026	4617679	Digital phase lock loop circuit
2027	4617678	Apparatus for detecting and recovering binary data from an input signal
2028	4617520	Digital lock detector for a phase-locked loop
2029	4615041	Adaptively tuned clock recovery circuit
2030	4613859	Pager receiver selectively changeable between call number reception and message reception
2031	4611335	Digital data synchronizing circuit
2032	4608702	Method for digital clock recovery from Manchester-encoded signals
2033	4607230	Receiver unit having synchronous pull-in circuit
2034	4602375	Onboard clock correction by means of drift prediction
2035	4600943	Sampling pulse generator
2036	4600895	Precision phase synchronization of free-running oscillator output signal to reference signal
2037	4600845	Fault-tolerant clock system
2038	4599735	Timing recovery circuit for synchronous data transmission using combination of L Bi phase and modified biphase codes
2039	4596937	Digital phase-locked loop
2040	4596024	Data detector using probabalistic information in received signals
2041	4593379	Method and a device for synchronization of messages
2042	4592077	NRZ digital data recovery
2043	4592076	Synchronizing signal recovery circuit for radiotelephones
2044	4590602	Wide range clock recovery circuit
2045	4589120	Unique start bit for data transmissions
2046	4584695	Digital PLL decoder
2047	4584694	Method and apparatus for estimating baud rate
2048	4583238	Synchronous data transmission system using a carrier modulated by an envelope of constant amplitude
2049	4578799	Method and apparatus for recovering data and clock information from a self-clocking data stream
2050	4575860	Data clock recovery circuit
2051	4574243	Multiple frequency digital phase locked loop
2052	4573173	Clock synchronization device in data transmission system
2053	4573024	PLL having two-frequency VCO
2054	4573017	Unitary phase and frequency adjust network for a multiple frequency digital phase locked loop
2055	4569065	Phase-locked clock
2056	4569063	Digital phase locking arrangement for synchronizing digital span data
2057	4568881	Phase comparator and data separator
1985
2058	4561099	Clock recovery system for TDMA satellite communication system
2059	4561098	Receiver for FFSK modulated data signals
2060	4558409	Digital apparatus for synchronizing a stream of data bits to an internal clock
2061	4546486	Clock recovery arrangement
2062	4543531	Digital data detecting apparatus
2063	4542517	Digital serial interface with encode logic for transmission
2064	4542504	Shared data receiver
2065	4541009	Process and device for sampling a sine wave signal by a multiple frequency signal
2066	4539693	Bit synchronization arrangement for a data modem or data receiver
2067	4538119	Clock extraction circuit using an oscillator and phase-locked programmable divider
2068	4536876	Self initializing phase locked loop ring communications system
2069	4535461	Digital clock bit synchronizer
2070	4535459	Signal detection apparatus
2071	4535295	Method and device for controlling the phase of timing signal
2072	4531223	Clock derivation circuits
2073	4528512	Timing synchronizing circuit for demodulators
2074	4527277	Timing extraction circuit
2075	4525848	Manchester decoder
2076	4524448	Variable delay unit for data synchronizer using phase-sensitive counter to vary the delay
2077	4523322	Interface device for modems
2078	4520483	Signal diagnostic method and apparatus for multiple transmission system
2079	4518961	Universal paging device with power conservation
2080	4517682	Method and an apparatus for synchronizing received binary signals
2081	4513427	Data and clock recovery system for data communication controller
2082	4509164	Microprocessor based digital to digital converting dataset
2083	4506262	Synchronization of digital radio pager
2084	4500992	Synchronizing arrangement
2085	4494242	Timing recovery in a baud-rate sampled-data system
2086	4493094	Clock phase control with time distribution of phase corrections
1984
2087	4475085	Clock synchronization signal generating circuit
2088	4466111	Synchronization apparatus and method
2089	4464771	Phase-locked loop circuit arrangement
2090	4464769	Method and apparatus for synchronizing a binary data signal
2091	4459701	Process and device for synchronizing at reception digital signals transmitted in packages
2092	4456890	Data tracking clock recovery system using digitally controlled oscillator
2093	4456884	Phase-lock loop and Miller decoder employing the same
2094	4453259	Digital synchronization technique
2095	4443883	Data synchronization apparatus
2096	4437071	Device for the recovery of a clock signal from a binary signal
2097	4436763	Method of plating a wire with metal
2098	4435825	Clock signal extracting circuit
2099	4433424	Multichannel common clock
2100	4427895	Method and apparatus for optical fiber communication operating at gigabits per second
2101	4424497	System for phase locking clock signals to a frequency encoded data stream
1983
2102	4422176	Phase sensitive detector
2103	4419760	Augmented phase-locked loop for very wide range acquisition and method therefor
2104	4417213	Data regenerative system for NRZ mode signals
2105	4415984	Synchronous clock regenerator for binary serial data signals
2106	4414676	Signal synchronization system
2107	4413236	Circuit for deriving a timing signal from digital imput signals
2108	4404681	Device for setting a signal processing circuit
2109	4404680	Digital phase synchronizer
2110	4400817	Method and means of clock recovery in a received stream of digital data
2111	4400667	Phase tolerant bit synchronizer for digital signals
2112	4398218	Signal monitor system
2113	4395773	Apparatus for identifying coded information without internal clock synchronization
2114	4393273	FM-Receiver with transmitter characterization
2115	4390985	Device for the synchronization of digital data transmitted in packets
2116	4390801	Circuit for reproducing a clock signal
2117	4386323	Arrangement for synchronizing the phase of a local clock signal with an input signal
2118	4385396	NRZ Digital data recovery
2119	4385395	Bit clock reproducing circuit
2120	4380815	Simplified NRZ data phase detector with expanded measuring interval
2121	4380083	Method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal
2122	4379284	Coherent phase shift keyed demodulator for power line communication systems
2123	4373204	Phase locked loop timing recovery circuit
2124	4371975	Sampling NRZ data phase detector
2125	4371974	NRZ Data phase detector
1982
2126	4365329	Process and device for phasing a local clock
2127	4361897	Circuit arrangement for clock pulse recovery at the receiving end of digital clock-controlled data transmission systems
2128	4360926	Digital phase-locked loop
2129	4356518	High frequency digital PCM decoding apparatus
2130	4355408	System for extracting timing information from a digital waveform
2131	4355284	Phase correction system
2132	4354274	Digital signal transmission system
2133	4352195	Device for the synchronization of a timing signal
2134	4352193	Intended value determination system
2135	4348762	Circuit for correcting data reading clock pulses
2136	4339823	Phase corrected clock signal recovery circuit
2137	4339817	Clock recovery circuit for burst communications systems
2138	4338569	Delay lock loop
2139	4335361	Variable gain amplifier
2140	4333060	Phase locked loop for recovering data bit timing
2141	4330863	Demodulator arrangement
2142	4328588	Synchronization system for digital data
2143	4327442	Clock recovery device
2144	4326287	Two wire bi-directional digital telephone link
2145	4326168	Signal monitor system
2146	4325090	Device for synchronizing a clock pulse generator with a serial data signal
2147	4322850	Sampling system for decoding biphase-coded data messages
2148	4321483	Apparatus for deriving clock pulses from return-to-zero data pulses
2149	4320527	Bit synchronizing system for pulse signal transmission
2150	4320515	Bit synchronizer
2151	4320473	Borehole acoustic telemetry clock synchronization system
2152	4317211	Manchester code decoding apparatus
2153	4317080	Signal monitor system
2154	4312075	Timing-phase recovery circuit
2155	4311964	Coherent phase shift keyed demodulator for power line communication systems
2156	4309673	Delay lock loop modulator and demodulator
2157	4309662	Circuit for rapidly resynchronizing a clock
1981
2158	4308619	Apparatus and methods for synchronizing a digital receiver
2159	4308505	Frequency detector device and method
2160	4302845	Phase-encoded data signal demodulator
2161	4302831	Method and circuit arrangement for clock synchronization in the transmission of digital information signals
2162	4288874	Timing data reproduction system
2163	4287480	Phase locked loop out-of-lock detector
2164	4284843	Repeating station for use in digital data communications link
2165	4280224	Bit synchronizer with early and late gating
2166	4280099	Digital timing recovery system
2167	4276651	Clock circuitry for a data communication system
2168	4276650	Method of synchronizing a quadphase receiver and clock synchronization device for carrying out the method
2169	4266198	Sampling system for decoding biphase-coded data messages
2170	4263672	Apparatus for synchronization on the basis of a received digital signal
2171	4253188	Clock synchronization for data communication receiver
2172	4251801	Mobile data communication system
1980
2173	4242754	Clock recovery system for data receiver
2174	4231114	Synchronizing means for a two-way communication system
2175	4231071	Reader for data recorded on magnetic disks at plural densities
2176	4229825	Synchronizing circuit for a digital arrangement
2177	4229824	Method and apparatus for synchronizing electrical signals
2178	4229823	Digital clock phase recovery circuits for data receiver
2179	4229822	Data detector for a data communication system
2180	4227251	Clock pulse regenerator
2181	4222013	Phase locked loop for deriving clock signal from aperiodic data signal
2182	4222009	Phase lock loop preconditioning circuit
2183	4218769	Means for subdividing a baud period into multiple integration intervals to enhance digital message detection
2184	4216544	Digital clock recovery circuit
2185	4216543	Means for deriving baud timing from an available AC signal
2186	4215430	Fast synchronization circuit for phase locked looped decoder
2187	4215348	Method of and system for synchronizing data reception and retransmission aboard communication satellite
2188	4210776	Linear digital phase lock loop
2189	4208724	System and method for clocking data between a remote unit and a local unit
2190	4207523	Digital channel on-line pseudo error dispersion monitor
2191	4206414	Electrical synchronizing circuits
2192	4201948	Phase-locked loop clock pulse extraction circuit
2193	4191975	Digital phase synchronizing system
2194	4191849	Data synchronization circuit
2195	4189622	Data communication system and bit-timing circuit
2196	4188582	Simulcast transmission system having phase-locked remote transmitters
2197	4187438	Circuit arrangement for unilaterally scanning distorted teletype characters
1979
2198	4180783	Phase lock loop data timing recovery circuit
2199	4166984	Restricted rate of change phase lock loop apparatus
2200	4166979	System and method for extracting timing information from a modulated carrier
2201	4156867	Data communication system with random and burst error protection and correction
2202	4151485	Digital clock recovery circuit
2203	4137427	Synchronizing device for the receiver clock of a data transmission system using PSK modulation
1978
2204	4131856	Electrical synchronizing circuits
2205	4129748	Phase locked loop for providing continuous clock phase correction
2206	4124820	Asynchronous digital delay line
2207	4119796	Automatic data synchronizer
2208	4118738	Time base error corrector
2209	4110557	Phase lock oscillator for use in data processing system
2210	4107459	Data processor analyzer and display system
2211	4105979	Clock regenerator comprising a frequency divider controlled by an up-down counter
2212	4100541	High speed manchester encoder
2213	4090242	Method and means for evaluating phase encoded communication systems
2214	4087627	Clock regenerator comprising a reversible shift register and a controllable frequency divider
2215	4083009	High reliability diversity communications system
2216	4080572	Receiver and method for synchronizing and detecting coded waveforms
2217	4079329	Signal demodulator including data normalization
2218	4069462	Phase-locked loops
2219	4066978	Digital phase-locked loop filter
1977
2220	4057768	Variable increment phase locked loop circuit
2221	4054950	Apparatus for detecting a preamble in a bi-phase data recovery system
2222	4039748	Method and device for synchronizing the receiver clock in a data transmission system
2223	4034309	Apparatus and method for phase synchronization
2224	4031478	Digital phase/frequency comparator
2225	4031317	Data communications system with improved digital phase-locked loop retiming circuit
2226	4029905	Apparatus for detecting the rhythm of an NRZ message
2227	4029900	Digital synchronizing signal recovery circuits for a data receiver
2228	4028626	Digital data receiver with automatic timing recovery and control
2229	4027261	Synchronization extractor
2230	4019153	Digital phase-locked loop filter
2231	4019149	Correlative data demodulator
2232	4019143	Standby apparatus for clock signal generators
2233	4015083	Timing recovery circuit for digital data
2234	4012598	Method and means for pulse receiver synchronization
2235	4012591	Circuit arrangement for the phase control of a clock signal
2236	4010421	Synchronization method for the recovery of binary signals
2237	4010323	Digital timing recovery
2238	4004226	QAM receiver having automatic adaptive equalizer
2239	4004090	Bit synchronization circuit
2240	4001775	Automatic bit synchronization method and apparatus for a logging-while-drilling receiver
2241	4001693	Apparatus for establishing communication between a first radio transmitter and receiver and a second radio transmitter and receiver
1976
2242	3992581	Phase locked loop NRZ data repeater
2243	3986126	Serial pulse-code-modulated retiming system
2244	3986125	Phase detector having a 360 linear range for periodic and aperiodic input pulse streams
2245	3986053	Regenerator for pulse code modulation systems
2246	3983498	Digital phase lock loop
2247	3982194	Phase lock loop with delay circuits for relative digital decoding over a range of frequencies
2248	3980820	Clock phasing circuit
2249	3979692	Apparatus for phase keying in frequency and phase voltage controlled oscillator with an incoming signal having a T period, and phase coded of the biphase PCM type or PSK type
2250	3979691	Acquisition process in a phase-locked-loop by switched phase means
2251	3971996	Phase tracking network
2252	3962541	Frequency sample-and-hold circuit
2253	3961138	Asynchronous bit-serial data receiver
2254	3959601	Variable rate clock signal recovery circuit
2255	3952254	Timing signal regenerating circuit
2256	3950705	Noise rejection method and apparatus for digital data systems
2257	3950658	Data separator with compensation circuit
2258	3947634	System for synchronizing local pseudo-noise sequence to a received baseband signal
2259	3946323	Digital circuit for generating output pulses synchronized in time to zero crossings of incoming waveforms
2260	3940558	Remote master/slave station clock
© 2017, ПАТ-Инфо, В.И. Карнышев Дата формирования списка: 03.04.2017